UPD78F9221CS-CAC-A Renesas Electronics America, UPD78F9221CS-CAC-A Datasheet - Page 235
UPD78F9221CS-CAC-A
Manufacturer Part Number
UPD78F9221CS-CAC-A
Description
MCU 8BIT 2KB FLASH 20PIN
Manufacturer
Renesas Electronics America
Series
78K0S/Kx1+r
Datasheet
1.UPD78F9221MC-5A4-A.pdf
(418 pages)
Specifications of UPD78F9221CS-CAC-A
Core Processor
78K0S
Core Size
8-Bit
Speed
10MHz
Connectivity
LIN, UART/USART
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
15
Program Memory Size
2KB (2K x 8)
Program Memory Type
FLASH
Ram Size
128 x 8
Voltage - Supply (vcc/vdd)
2 V ~ 5.5 V
Data Converters
A/D 4x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
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13.1 Standby Function and Configuration
13.1.1 Standby function
available.
Notes 1.
Caution The LSRSTOP setting is valid only when “Can be stopped by software” is set for the low-speed
Remark LSRSTOP: Bit 0 of the low-speed internal oscillation mode register (LSRCM)
The standby function is designed to reduce the operating current of the system. The following two modes are
(1) HALT mode
Operation Mode
Reset
STOP
HALT
HALT instruction execution sets the HALT mode. In the HALT mode, the CPU operation clock is stopped.
Oscillation of the system clock oscillator continues. If the low-speed internal oscillator is operating before the
HALT mode is set, oscillation of the clock of the low-speed internal oscillator continues (refer to Table 13-1.
Oscillation of the low-speed internal oscillation clock (whether it cannot be stopped or can be stopped by
software) is set by the option byte). In this mode, the operating current is not decreased as much as in the
STOP mode, but the HALT mode is effective for restarting operation immediately upon interrupt request
generation and frequently carrying out intermittent operations.
2.
3.
internal oscillator by the option byte.
When “Cannot be stopped” is selected for low-speed internal oscillator by the option byte.
When it is selected that the low-speed internal oscillator “can be stopped by software”, oscillation of the
low-speed internal oscillator can be stopped by LSRSTOP.
If the operating clock of the watchdog timer is the low-speed internal oscillation clock, the watchdog
timer is stopped.
Status
Table 13-1. Relationship Between Operation Clocks in Each Operation Status
Stopped
Oscillating
Note 1
CHAPTER 13 STANDBY FUNCTION
Low-Speed Internal Oscillator
Oscillating
LSRSTOP = 0
User’s Manual U16898EJ6V0UD
Note 3
Note 2
Stopped
LSRSTOP = 1
Stopped
Oscillating
System Clock
Stopped
Oscillating
Clock Supplied to
Peripheral
Hardware
233
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