UPD78F1201MC-CAB-AX Renesas Electronics America, UPD78F1201MC-CAB-AX Datasheet - Page 375
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UPD78F1201MC-CAB-AX
Manufacturer Part Number
UPD78F1201MC-CAB-AX
Description
MCU 16BIT 78K0R/LX3 30-SSOP
Manufacturer
Renesas Electronics America
Series
78K0R/Ix3r
Datasheet
1.UPD78F1201MC-CAB-AX.pdf
(1067 pages)
Specifications of UPD78F1201MC-CAB-AX
Core Processor
78K/0R
Core Size
16-Bit
Speed
40MHz
Connectivity
3-Wire SIO, I²C, LIN, UART/USART
Peripherals
DMA, LVD, POR, PWM, WDT
Number Of I /o
21
Program Memory Size
16KB (16K x 8)
Program Memory Type
FLASH
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 6x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
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(17) Timer dead time output enable register 0 (TDE0)
Address: F01F2H, F01F3H
Symbol
TDE0
TDE0 enables or disables dead time control of the timer output of each channel.
The setting of each channel n specified by using this register is applied when timer output is enabled (TOEn =
1), and TOMn and TOTn are set to 1.
TDE0 can be rewritten when timer operation is stopped (TEn = 0).
The TDEn value must be set the same for the even-number channel and odd-number channel for which dead
time control is performed, because dead time control is performed for a set of an even-number channel and
odd-number channel (even-number channel + 1).
TDE0 can be set by a 16-bit memory manipulation instruction.
Reset signal generation clears this register to 0000H.
Caution Be sure to clear bits 15 to 12 to 0.
Remark n = 00 to 11
TDE
15
0
n
0
1
Figure 7-8. Format of Timer Dead Time Output Enable Register 0 (TDE0)
Disables dead time control.
Enables dead time control.
14
0
13
0
After reset: 0000H
CHAPTER 7 INVERTER CONTROL FUNCTIONS
12
0
TDE
11
11
User’s Manual U19678EJ1V1UD
TDE
10
10
R/W
TDE
09
Selection of dead time control
9
TDE
08
8
TDE
07
7
TDE
06
6
TDE
05
5
TDE
04
4
TDE
03
3
TDE
02
2
TDE
01
1
TDE
00
0
373
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