UPD78F1201MC-CAB-AX Renesas Electronics America, UPD78F1201MC-CAB-AX Datasheet - Page 453
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UPD78F1201MC-CAB-AX
Manufacturer Part Number
UPD78F1201MC-CAB-AX
Description
MCU 16BIT 78K0R/LX3 30-SSOP
Manufacturer
Renesas Electronics America
Series
78K0R/Ix3r
Datasheet
1.UPD78F1201MC-CAB-AX.pdf
(1067 pages)
Specifications of UPD78F1201MC-CAB-AX
Core Processor
78K/0R
Core Size
16-Bit
Speed
40MHz
Connectivity
3-Wire SIO, I²C, LIN, UART/USART
Peripherals
DMA, LVD, POR, PWM, WDT
Number Of I /o
21
Program Memory Size
16KB (16K x 8)
Program Memory Type
FLASH
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 6x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
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7.5.10 Operation as linked real-time output function (type 1)
1 so that it occurs later than INTTM00 of master channel 0. By using this function, the TROm value of slave channels
2 to 7 (the real-time output channels) can be specified to be output from TOm after INTTM00 of the master channel
has occurred.
channel is used as the real-time output trigger. The real-time output channel of slave channels 2 to 7 outputs the set
value of TROm from TOm by the real-time output trigger.
time, INTTM00 is output by setting MD000 of TMR00 to “1”.
TDR00 again at the same timing. Similar operation is continued hereafter.
value of TDRm to TCRm, using INTTM00 of the master channel as a start trigger, and starts counting down. When
TCRn = 0000H, TCRn outputs INTTMn and stops counting until the next start trigger (INTTM00 of the master
channel) has been input. The setting values of TROn and TROm are output from TOn and TOm at the INTTMn
output timing of slave channel 1.
TRCm bits.
outputs the setting value of TROm at the INTTMn output timing of slave channel 1. In the lower channel, TOm does
not output the set values of TROm at the INTTMn output timing of slave channel 1 when TREm = 0 or TRCm = 1.
functions.
INTTM00 of the master channel).
The linked real-time output function (type 1) includes a function to delay the generation of INTTMn of slave channel
If TRCn of the slave channel 1 is set to 1, INTTMn generated by using the combination-operation with master
Slave channel 1 adds a delay to INTTM00 of the master channel and generates a real-time output trigger.
The delay value for INTTM00 of the master channel can be calculated by the following expression.
The master channel operates in the interval timer mode and counts the periods.
TCR00 loads the value of TDR00 at the first count clock, after the channel start trigger bit (TS00) is set to 1. At this
Afterward, TCR00 counts down along with the count clock.
When TCR00 has become 0000H, INTTM00 is output upon the next count clock. TCR00 loads the value of
TCRn of slave channel 1 operates in one-count mode and generates a real-time output trigger. TCRm loads the
A and b, which a is too expensive
TOm of the lower channel (slave channels 2 to 7) of the slave channel 1 (TRCn = 1) is controlled by the TREm and
When TREm of the lower channel (TRCm = 0) is “1”, the channel operates as a real-time output channel and TOm
When this function is used, TCRm, TDRm, and INTTMm of the lower channel can be operated as different
TDR00 and TDRn of the master channel and slave channel 1 become valid from the next period (generation of
Caution
Remark
Delay value for INTTM00 of the master channel = (Set value of TDRn (slave 1) + 1) × Count clock period
n = 01
m = 02 to 07
TS00 or TSn cannot be set to “1” (forcible restart) while TE00 = 1 or TEn = 1. If TS00 or TSn is set
to “1” while TE00 = 1 or TEn = 1, the counter value (TCR00 or TCRn) will be illegal and TOm will
not be able to output the expected waveform.
CHAPTER 7 INVERTER CONTROL FUNCTIONS
User’s Manual U19678EJ1V1UD
451
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