UPD78F1201MC-CAB-AX Renesas Electronics America, UPD78F1201MC-CAB-AX Datasheet - Page 51
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UPD78F1201MC-CAB-AX
Manufacturer Part Number
UPD78F1201MC-CAB-AX
Description
MCU 16BIT 78K0R/LX3 30-SSOP
Manufacturer
Renesas Electronics America
Series
78K0R/Ix3r
Datasheet
1.UPD78F1201MC-CAB-AX.pdf
(1067 pages)
Specifications of UPD78F1201MC-CAB-AX
Core Processor
78K/0R
Core Size
16-Bit
Speed
40MHz
Connectivity
3-Wire SIO, I²C, LIN, UART/USART
Peripherals
DMA, LVD, POR, PWM, WDT
Number Of I /o
21
Program Memory Size
16KB (16K x 8)
Program Memory Type
FLASH
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 6x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
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(3) 48-pin products
Note
Function Name
P10
P11
P12
P13
P20 to P27
P30
P31
P32
P40
P41
P50
P51
P52
P60
P61
P70
P71
P72
P73
P74
P75
P80
P81
P82
P83
(a) Port functions (1/2): 78K0R/IC3 48-pin products
Note
If on-chip debugging is enabled by using an option byte, be sure to pull up the P40/TOOL0 pin externally (see
Caution in 2.2.5 P40 to P43 (port 4)).
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
Port 1.
4-bit I/O port.
Input/output can be specified in 1-bit units.
Use of an on-chip pull-up resistor can be specified by a software
setting.
Port 2.
8-bit I/O port.
Input/output can be specified in 1-bit units.
Port 3.
3-bit I/O port.
Input of P31 and P32 can be set to TTL buffer.
Output of P30 to P32 can be set to N-ch open-drain output (V
tolerance).
Input/output can be specified in 1-bit units.
Use of an on-chip pull-up resistor can be specified by a software
setting.
Port 4.
2-bit I/O port.
Input/output can be specified in 1-bit units.
Use of an on-chip pull-up resistor can be specified by a software
setting.
Port 5.
3-bit I/O port.
Input/output can be specified in 1-bit units.
Use of an on-chip pull-up resistor can be specified by a software
setting.
Port 6.
2-bit I/O port.
Output of P60 and P61 is N-ch open-drain output (6 V tolerance).
Input/output can be specified in 1-bit units.
Port 7.
6-bit I/O port.
Input of P71, P72, P74, and P75 can be set to TTL buffer.
Output of P70, P72, P73, and P75 can be set to N-ch open-drain
output (V
Input/output can be specified in 1-bit units.
Use of an on-chip pull-up resistor can be specified by a software
setting.
Port 8.
4-bit I/O port.
Inputs/output can be specified in 1-bit units.
Inputs of P80 to P83 can be set as comparator inputs or
programmable gain amplifier inputs.
DD
tolerance).
CHAPTER 2 PIN FUNCTIONS
User’s Manual U19678EJ1V1UD
Function
DD
Input port
Digital input
port
Input port
Input port
Input port
Input port
Input port
Analog input
After Reset
TI02/TO02
TI03/TO03
TI04/TO04
TI05/TO05
ANI0 to ANI7
SO10/TxD1/TO11
SI10/RxD1/SDA10/
INTP1/TI09
SCK10/SCL10/
INTP2
TOOL0
TOOL1
TI06/TO06
TI07/TO07
SLTI/SLTO
SCL0
SDA0
SO01/INTP4
SI01/INTP5
SCK01/INTP6
SO00/TxD0/TO10
SI00/RxD0/TI10
SCK00/TI11
CMP0P/TMOFF0/
INTP3/PGAI
CMP0M
CMP1P/TMFF1/
INTP7
CMP1M
Alternate Function
49
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