SAK-XE164HM-24F80L AA Infineon Technologies, SAK-XE164HM-24F80L AA Datasheet - Page 15
SAK-XE164HM-24F80L AA
Manufacturer Part Number
SAK-XE164HM-24F80L AA
Description
IC MCU 16BIT FLASH 100-LQFP
Manufacturer
Infineon Technologies
Series
XE16xr
Datasheet
1.SAF-XE164KM-48F80L_AA.pdf
(125 pages)
Specifications of SAK-XE164HM-24F80L AA
Core Processor
C166SV2
Core Size
16-Bit
Speed
80MHz
Connectivity
EBI/EMI, I²C, LIN, SPI, SSC, UART/USART, USI
Peripherals
I²S, POR, PWM, WDT
Number Of I /o
76
Program Memory Size
192KB (192K x 8)
Program Memory Type
FLASH
Ram Size
24K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Data Converters
A/D 16x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
100-LFQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Other names
SP000628620
- Current page: 15 of 125
- Download datasheet (2Mb)
Key to Pin Definitions
•
•
Table 4
Pin
3
4
5
6
Data Sheet
Ctrl.: The output signal for a port pin is selected by bitfield PC in the associated
register Px_IOCRy. Output O0 is selected by setting the respective bitfield PC to
1x00
Output signal OH is controlled by hardware.
Type: Indicates the pad type and its power supply domain (A, B, M, 1)
– St: Standard pad
– Sp: Special pad
– DP: Double pad - can be used as standard or high-speed pad
– In: Input only pad
– PS: Power supply pad
Symbol
TESTM
P7.2
EMUX0
CCU62_CCP
OS0A
TDI_C
TRST
P7.0
T3OUT
T6OUT
TDO_A
ESR2_1
B
, output O1 is selected by 1x01
Pin Definitions and Functions
Ctrl.
I
O0 / I St/B
O1
I
I
I
O0 / I St/B
O1
O2
OH / I St/B
I
Type Function
In/B
St/B
St/B
St/B
In/B
St/B
St/B
St/B
Testmode Enable
Enables factory test modes, must be held HIGH for
normal operation (connect to
An internal pullup device will hold this pin high
when nothing is driving it.
Bit 2 of Port 7, General Purpose Input/Output
External Analog MUX Control Output 0 (ADC1)
CCU62 Position Input 0
JTAG Test Data Input
Test-System Reset Input
For normal system operation, pin TRST should be
held low. A high level at this pin at the rising edge
of PORST activates the XE164xM’s debug
system. In this case, pin TRST must be driven low
once to reset the debug system.
An internal pulldown device will hold this pin low
when nothing is driving it.
Bit 0 of Port 7, General Purpose Input/Output
GPT12E Timer T3 Toggle Latch Output
GPT12E Timer T6 Toggle Latch Output
JTAG Test Data Output / DAP1 Input/Output
ESR2 Trigger Input 1
XE164FM, XE164GM, XE164HM, XE164KM
B
, etc.
15
XE166 Family Derivatives / Base Line
General Device Information
V
DDPB
).
V2.0, 2009-03
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