SAK-XC2365A-104F80L AA Infineon Technologies, SAK-XC2365A-104F80L AA Datasheet - Page 111

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SAK-XC2365A-104F80L AA

Manufacturer Part Number
SAK-XC2365A-104F80L AA
Description
IC MCU 32BIT FLASH 100-LQFP
Manufacturer
Infineon Technologies
Series
XC23xxAr
Datasheet

Specifications of SAK-XC2365A-104F80L AA

Core Processor
C166SV2
Core Size
16/32-Bit
Speed
80MHz
Connectivity
CAN, EBI/EMI, I²C, LIN, SPI, SSC, UART/USART, USI
Peripherals
I²S, POR, PWM, WDT
Number Of I /o
75
Program Memory Size
832KB (832K x 8)
Program Memory Type
FLASH
Ram Size
50K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Data Converters
A/D 16x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
100-LFQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Other names
SP000448776
4.6.6
The following parameters are applicable for a USIC channel operated in SSC mode.
Note: These parameters are not subject to production test but verified by design and/or
Note: Operating Conditions apply.
Table 33
Parameter
Master Mode Timing
Slave select output SELO active
to first SCLKOUT transmit edge
Slave select output SELO inactive
after last SCLKOUT receive edge
Transmit data output valid time
Receive data input setup time to
SCLKOUT receive edge
Data input DX0 hold time from
SCLKOUT receive edge
Slave Mode Timing
Select input DX2 setup to first
clock input DX1 transmit edge
Select input DX2 hold after last
clock input DX1 receive edge
Data input DX0 setup time to
clock input DX1 receive edge
Data input DX0 hold time from
clock input DX1 receive edge
Data output DOUT valid time
1) The maximum value further depends on the settings for the slave select output leading delay.
2)
3) The maximum value depends on the settings for the slave select output trailing delay and for the shift clock
4) These input timings are valid for asynchronous input signal handling of slave select input, shift clock input, and
Data Sheet
t
output delay.
receive data input (bits DXnCR.DSEN = 0).
SYS
characterization.
= 1/
f
SYS
Synchronous Serial Interface Timing
(= 12.5 ns @ 80 MHz)
SSC Master/Slave Mode Timing for Upper Voltage Range
Symbol
t
t
t
t
t
t
t
t
t
t
1
2
3
4
5
10
11
12
13
14
CC
CC
CC
SR
SR
SR
SR
SR
SR
CC
XC2361A, XC2363A, XC2364A, XC2365A
XC2000 Family Derivatives / Base Line
111
Min.
t
- 8
t
- 6
-6
31
-4
7
7
7
5
7
SYS
SYS
Values
Typ.
Max.
1)
3)
9
33
Electrical Parameters
Unit Note /
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
V2.0, 2009-03
Test Co
ndition
2)
4)
4)
4)
4)
4)

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