UPD70F3744GJ-GAE-AX Renesas Electronics America, UPD70F3744GJ-GAE-AX Datasheet - Page 34

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UPD70F3744GJ-GAE-AX

Manufacturer Part Number
UPD70F3744GJ-GAE-AX
Description
MCU 32BIT V850ES/JX3 144-LQFP
Manufacturer
Renesas Electronics America
Series
V850ES/Jx3r
Datasheet

Specifications of UPD70F3744GJ-GAE-AX

Core Processor
RISC
Core Size
32-Bit
Speed
32MHz
Connectivity
CSI, EBI/EMI, I²C, UART/USART
Peripherals
DMA, LVD, PWM, WDT
Number Of I /o
128
Program Memory Size
512KB (512K x 8)
Program Memory Type
FLASH
Ram Size
40K x 8
Voltage - Supply (vcc/vdd)
2.85 V ~ 3.6 V
Data Converters
A/D 16x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
UPD70F3744GJ-GAE-AX
Manufacturer:
Renesas Electronics America
Quantity:
10 000
V850ES/JJ3
R01UH0016EJ0400 Rev.4.00
Sep 30, 2010
Notes 1. Connect a pull-up resistor externally.
HLDAK
HLDRQ
INTP0
INTP1
INTP2
INTP3
INTP4
INTP5
INTP6
INTP7
INTP8
KR0
KR1
KR2
KR3
KR4
KR5
KR6
KR7
NMI
RD
REGC
RESET
RTP00
RTP01
RTP02
RTP03
RTP04
RTP05
RTP10
RTP11
RTP12
RTP13
RTP14
RTP15
Pin Name
Note 2
Note 1
Note 1
Note 1
Note 1
Note 1
Note 1
Note 1
Note 1
2. The NMI pin alternately functions as the P02 pin. It functions as the P02 pin after reset. To enable the NMI
pin, set the PMC0.PMC02 bit to 1. The initial setting of the NMI pin is "No edge detected". Select the NMI
pin valid edge using INTF0 and INTR0 registers.
Pin No.
87
88
18
19
20
21
74
75
76
26
59
37
38
39
40
41
42
61
62
17
99
10
14
37
38
39
40
41
42
43
44
45
46
47
48
Output
Input
Input
Input
Input
Output
Input
Output
I/O
Bus hold acknowledge output
Bus hold request input
External interrupt request input (maskable, analog
noise elimination). Analog noise elimination/digital
noise elimination selectable for the INTP3 pin.
5 V tolerant
Key interrupt input (on-chip analog noise eliminator)
5 V tolerant
External interrupt input (non-maskable, analog noise
elimination)
5 V tolerant
Read strobe signal output for external memory
Connection of regulator output stabilization capacitance
(4.7
System reset input
Real-time output port
N-ch open-drain output selectable
5 V tolerant
μ
F (recommended value))
Function
CHAPTER 2 PIN FUNCTIONS
PCM2
PCM3
P03/ADTRG
P04
P05/DRST
P06
P913/A13
P914/A14/TIP51/TOP51
P915/A15/TIP50/TOP50
P31/RXDA0/SIB4
P80/RXDA3
P50/TIQ01/TOQ01/RTP00
P51/TIQ02/TOQ02/RTP01
P52/TIQ03/TOQ03/RTP02/DDI
P53/SIB2/TIQ00/TOQ00/RTP03/DDO
P54/SOB2/RTP04/DCK
P55/SCKB2/RTP05/DMS
P90/A0/TXDA1/SDA02
P91/A1/RXDA1/SCL02
P02
PCT4
P50/TIQ01/KR0/TOQ01
P51/TIQ02/KR1/TOQ02
P52/TIQ03/KR2/TOQ03/DDI
P53/SIB2/KR3/TIQ00/TOQ00/DDO
P54/SOB2/KR4/DCK
P55/SCKB2/KR5/DMS
P60
P61
P62
P63
P64
P65
Alternate Function
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