SAK-XC2287M-104F80L AA Infineon Technologies, SAK-XC2287M-104F80L AA Datasheet - Page 132

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SAK-XC2287M-104F80L AA

Manufacturer Part Number
SAK-XC2287M-104F80L AA
Description
IC MCU 32BIT FLASH 144-LQFP
Manufacturer
Infineon Technologies
Series
XC22xxMr
Datasheet

Specifications of SAK-XC2287M-104F80L AA

Core Processor
C166SV2
Core Size
16/32-Bit
Speed
80MHz
Connectivity
CAN, EBI/EMI, I²C, LIN, SPI, SSC, UART/USART, USI
Peripherals
I²S, POR, PWM, WDT
Number Of I /o
118
Program Memory Size
832KB (832K x 8)
Program Memory Type
FLASH
Ram Size
50K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Data Converters
A/D 24x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
144-LFQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Other names
SP000436560
Figure 27
Note: This timing diagram shows a standard configuration where the slave select signal
Data Sheet
is low-active and the serial clock signal is not shifted and not inverted.
Master Mode Timing
Select Output
SELOx
Clock Output
SCLKOUT
Data Output
DOUT
Data Input
DX0
Slave Mode Timing
Select Input
DX2
Clock Input
DX1
Data Input
DX0
Data Output
DOUT
USIC - SSC Master/Slave Mode Timing
Transmit Edge: with this clock edge , transmit data is shifted to transmit data output .
Receive Edge: with this clock edge , receive data at receive data input is latched .
Drawn for BRGH.SCLKCFG = 00
Inactive
Inactive
t
t
10
1
First Transmit
Edge
t
t
First Transmit
Edge
14
3
B
t
. Also valid for for SCLKCFG = 01
t
12
4
Data
Data
valid
valid
XC2000 Family Derivatives / Base Line
132
Receive
Edge
Receive
Edge
t
t
13
5
Active
Active
XC2287M, XC2286M, XC2285M
Transmit
Edge
Transmit
Edge
t
t
14
3
B
with inverted SCLKOUT signal .
Electrical Parameters
USIC_SSC_TMGX.VSD
t
t
12
4
Data
Data
valid
valid
t
Last Receive
Edge
Last Receive
Edge
t
t
t
13
5
11
2
Inactive
Inactive
V2.0, 2009-03

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