SAK-XC2287M-104F80L AA Infineon Technologies, SAK-XC2287M-104F80L AA Datasheet - Page 55

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SAK-XC2287M-104F80L AA

Manufacturer Part Number
SAK-XC2287M-104F80L AA
Description
IC MCU 32BIT FLASH 144-LQFP
Manufacturer
Infineon Technologies
Series
XC22xxMr
Datasheet

Specifications of SAK-XC2287M-104F80L AA

Core Processor
C166SV2
Core Size
16/32-Bit
Speed
80MHz
Connectivity
CAN, EBI/EMI, I²C, LIN, SPI, SSC, UART/USART, USI
Peripherals
I²S, POR, PWM, WDT
Number Of I /o
118
Program Memory Size
832KB (832K x 8)
Program Memory Type
FLASH
Ram Size
50K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Data Converters
A/D 24x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
144-LFQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Other names
SP000436560
3.3
The core of the CPU consists of a 5-stage execution pipeline with a 2-stage instruction-
fetch pipeline, a 16-bit arithmetic and logic unit (ALU), a 32-bit/40-bit multiply and
accumulate unit (MAC), a register-file providing three register banks, and dedicated
SFRs. The ALU features a multiply-and-divide unit, a bit-mask generator, and a barrel
shifter.
Figure 4
Data Sheet
CPU
MAC
Prefetch
Multiply
Branch
FIFO
IDX0
IDX1
MAH
QX0
QX1
Unit
Unit
Unit
+/-
+/-
Central Processing Unit (CPU)
CPU Block Diagram
CSP
CPUCON1
CPUCON2
Return
MRW
MCW
MSW
MAL
Stack
QR0
QR1
+/-
IP
IFU
Division Unit
Multiply Unit
ZEROS
DPP0
DPP1
DPP2
DPP3
PSW
MDC
MDH
Exception
Injection/
VECSEG
Handler
XC2000 Family Derivatives / Base Line
TFR
Bit-Mask-Gen.
Barrel-Shifter
55
SPSEG
STKOV
STKUN
ONES
MDL
SP
+/-
ADU
ALU
XC2287M, XC2286M, XC2285M
RF
DMU
PMU
GPRs
2-Stage
R15
R14
5-Stage
GPRs
R1
R0
Buffer
R15
R14
Prefetch
R1
R0
Pipeline
CP
GPRs
R15
R14
Pipeline
R1
R0
IPIP
WB
Functional Description
Peripherals
Flash/ROM
mca04917_x.vsd
PSRAM
DPRAM
DSRAM
V2.0, 2009-03
EBC
GPRs
R15
R14
R1
R0

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