PIC18F2539T-I/SO Microchip Technology, PIC18F2539T-I/SO Datasheet - Page 12

• Manufacturer Part Number: PIC18F2539T-I/SO
• Description: IC MCU FLASH 12KX16 EE AD 28SOIC
• Manufacturer: Microchip Technology
• Series: PIC® 18Fr

Specifications of PIC18F2539T-I/SO

• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 40MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, LVD, POR, PWM, WDT
• Number Of I /o: 21
• Program Memory Size: 24KB (12K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 256 x 8
• Ram Size: 1408 x 8
• Voltage - Supply (vcc/vdd): 4.2 V ~ 5.5 V
• Data Converters: A/D 5x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 28-SOIC (7.5mm Width)
• Processor Series: PIC18F
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 1408 B
• Interface Type: I2C, SPI, AUSART
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 21
• Number Of Timers: 16 bit
• Operating Supply Voltage: 2 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
• Development Tools By Supplier: DV164005, DV164136
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 5 bit
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

PIC18FXX39
3.2.1
When using low voltage ICSP, the part must be
supplied by the voltage specified in parameter D111, if
a bulk erase is to be executed. All other bulk erase
details as described above apply.
If it is determined that a program memory erase must
be performed at a supply voltage below the bulk erase
limit, refer to the erase methodology described in
Section 3.3.1.
If it is determined that a data EEPROM erase must be
performed at a supply voltage below the bulk erase
limit, follow the methodology described in Section 3.4
and write zeroes to the array.
3.3
Programming code memory is accomplished by first
loading data into the appropriate write buffers and then
initiating a programming sequence. Each panel in the
code memory space (see Figure 2-2) has an 8-byte
deep write buffer that must be loaded prior to initiating
FIGURE 3-5:
DS30480C-page 12
Note: TBLPTR = TBLPTRU:TBLPTRH:TBLPTRL.
Panel n
Code Memory Programming
TBLPTR<2:0> = 7
TBLPTR<2:0> = 6
TBLPTR<2:0> = 5
TBLPTR<2:0> = 4
TBLPTR<2:0> = 3
TBLPTR<2:0> = 2
TBLPTR<2:0> = 1
TBLPTR<2:0> = 0
LOW VOLTAGE ICSP BULK ERASE
ERASE AND WRITE BOUNDARIES
Offset = TBLPTR<12:3>
Preliminary
a write sequence. The actual memory write sequence
takes the contents of these buffers and programs the
associated EEPROM code memory.
The programming duration is externally timed and is
controlled by SCLK. After a “Start Programming”
command is issued (4-bit command, ‘1111’), a NOP is
issued where the 4th SCLK is held high for the duration
of the programming time, P9.
After SCLK is brought low, the programming sequence
is terminated. SCLK must be held low for the time
specified by parameter P10 to allow high voltage
discharge of the memory array.
The code sequence to program a PIC18FXX39 device
is shown in Table 3-4. The flowchart shown in
Figure 3-7 depicts the logic necessary to completely
write a PIC18FXX39 device.
Note:
The TBLPTR register must contain the
same offset value when initiating the pro-
gramming sequence as it did when the
write buffers were loaded.
 2010 Microchip Technology Inc.
Erase Region
Offset = TBLPTR<12:6>
(64 bytes)