PIC18F2539T-I/SO Microchip Technology, PIC18F2539T-I/SO Datasheet - Page 5

IC MCU FLASH 12KX16 EE AD 28SOIC

PIC18F2539T-I/SO

Manufacturer Part Number
PIC18F2539T-I/SO
Description
IC MCU FLASH 12KX16 EE AD 28SOIC
Manufacturer
Microchip Technology
Series
PIC® 18Fr

Specifications of PIC18F2539T-I/SO

Core Processor
PIC
Core Size
8-Bit
Speed
40MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, LVD, POR, PWM, WDT
Number Of I /o
21
Program Memory Size
24KB (12K x 16)
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
1408 x 8
Voltage - Supply (vcc/vdd)
4.2 V ~ 5.5 V
Data Converters
A/D 5x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
28-SOIC (7.5mm Width)
Processor Series
PIC18F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
1408 B
Interface Type
I2C, SPI, AUSART
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
21
Number Of Timers
16 bit
Operating Supply Voltage
2 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
Development Tools By Supplier
DV164005, DV164136
Minimum Operating Temperature
- 40 C
On-chip Adc
5 bit
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
2.5
The High Voltage ICSP Program/Verify mode is
entered by holding SCLK and SDATA low, and then
raising MCLR/V
mode, the code memory, data EEPROM, ID locations,
and
programmed in serial fashion.
The sequence that enters the device into the
Programming/Verify mode places all unused I/Os in the
high impedance state.
FIGURE 2-4:
2.5.1
When the LVP configuration bit is ‘1’ (see Section 5.3),
the Low Voltage ICSP mode is enabled. Low Voltage
ICSP Program/Verify mode is entered by holding SCLK
and SDATA low, placing a logic high on PGM, and then
raising MCLR/V
pin is dedicated to the programming function and
ceases to be a general purpose I/O pin.
The sequence that enters the device into the
Programming/Verify mode places all unused I/O’s in
the high impedance state.
 2010 Microchip Technology Inc.
MCLR/V
V
SDATA
SCLK
DD
configuration
Entering High Voltage ICSP
Program/Verify Mode
D110
ENTERING LOW VOLTAGE ICSP
PROGRAM/VERIFY MODE
PP
PP
PP
to V
to V
SDATA = Input
bits
P13
ENTERING HIGH
VOLTAGE PROGRAM/
VERIFY MODE
IHH
IH
. In this mode, the RB5/PGM
(high voltage). Once in this
can
P12
be
accessed
and
Preliminary
FIGURE 2-5:
2.6
The SCLK pin is used as a clock input pin and the
SDATA pin is used for entering command bits and data
input/output during serial operation. Commands and
data are transmitted on the rising edge of SCLK,
latched on the falling edge of SCLK, and are Least
Significant bit (LSb) first.
2.6.1
All instructions are 20 bits, consisting of a leading 4-bit
command followed by a 16-bit operand, which depends
on the type of command being executed. To input a
command, SCLK is cycled four times. The commands
needed for programming and verification are shown in
Table 2-3.
TABLE 2-3:
Core Instruction
(Shift in16-bit instruction)
Shift out TABLAT register
Table Read
Table Read, post-increment
Table Read, post-decrement
Table Read, pre-increment
Table Write
Table Write, post-increment by 2
Table Write, post-decrement by 2
Table Write, start programming
MCLR/V
PGM
SDATA
SCLK
V
DD
Serial Program/Verify Operation
PP
4-BIT COMMANDS
V
Description
IH
COMMANDS FOR
PROGRAMMING
V
SDATA = Input
IH
PIC18FXX39
P15
ENTERING LOW
VOLTAGE PROGRAM/
VERIFY MODE
P12
DS30480C-page 5
Command
0000
0010
1000
1001
1010
1011
1100
1101
1110
1111
4-bit

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