PIC18F2539T-I/SO Microchip Technology, PIC18F2539T-I/SO Datasheet - Page 26

• Manufacturer Part Number: PIC18F2539T-I/SO
• Description: IC MCU FLASH 12KX16 EE AD 28SOIC
• Manufacturer: Microchip Technology
• Series: PIC® 18Fr

Specifications of PIC18F2539T-I/SO

• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 40MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, LVD, POR, PWM, WDT
• Number Of I /o: 21
• Program Memory Size: 24KB (12K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 256 x 8
• Ram Size: 1408 x 8
• Voltage - Supply (vcc/vdd): 4.2 V ~ 5.5 V
• Data Converters: A/D 5x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 28-SOIC (7.5mm Width)
• Processor Series: PIC18F
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 1408 B
• Interface Type: I2C, SPI, AUSART
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 21
• Number Of Timers: 16 bit
• Operating Supply Voltage: 2 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
• Development Tools By Supplier: DV164005, DV164136
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 5 bit
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

PIC18FXX39
TABLE 5-3:
DS30480C-page 26
CPD
CPB
WRT0
WRT1
WRT2
WRTD
WRTB
WRTC
EBTR0
EBTR1
EBTR2
EBTRB
DEV10:DEV3
DEV2:DEV0
REV4:REV0
Bit Name
PIC18FXX39 BIT DESCRIPTION (CONTINUED)
Configuration
CONFIG5H
CONFIG5H
CONFIG6H
CONFIG6H
CONFIG6H
CONFIG7H
CONFIG6L
CONFIG6L
CONFIG6L
CONFIG7L
CONFIG7L
CONFIG7L
DEVID2
DEVID1
DEVID1
Words
Code Protection bits (data EEPROM)
1 = Data EEPROM not code protected
0 = Data EEPROM code protected
Code Protection bits (boot block, memory area 0000h - 01FFh)
1 = Boot block not code protected
0 = Boot block code protected
Table Write Protection bit (code memory area 0200h - 1FFFh)
1 = Code memory not write protected
0 = Code memory write protected
Table Write Protection bit (code memory area 2000h - 3FFFh)
1 = Code memory not write protected
0 = Code memory write protected
Table Write Protection bit (code memory area 4000h - 5FFFh)
1 = Code memory not write protected
0 = Code memory write protected
Table Write Protection bit (data EEPROM)
1 = Data EEPROM not write protected
0 = Data EEPROM write protected
Table Write Protection bit (boot block, memory area 0000h - 01FFh)
1 = Boot block not write protected
0 = Boot block write protected
Table Write Protection bit (Configuration registers)
1 = Configuration registers not write protected
0 = Configuration registers write protected
Table Read Protection bit (code memory area 0200h - 01FFFh)
1 = Code memory not protected from table reads executed in other blocks
0 = Code memory protected from table reads executed in other blocks
Table Read Protection bit (code memory area 2000h - 3FFFh)
1 = Code memory not protected from table reads executed in other blocks
0 = Code memory protected from table reads executed in other blocks
Table Read Protection bit (code memory area 4000h - 5FFFh)
1 = Code memory not protected from table reads executed in other blocks
0 = Code memory protected from table reads executed in other blocks
Table Read Protection bit (boot block, memory area 0000h - 01FFh)
1 = Boot block not protected from table reads executed in other blocks
0 = Boot block protected from table reads executed in other blocks
Device ID bits are used with the DEV2:DEV0 bits in the DEVID1 register to
identify part number.
Device ID bits are used with the DEV10:DEV3 bits in the DEVID2 register to
identify part number.
These bits are used to indicate the revision of the device.
Preliminary
Description
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