PIC18F2539T-I/SO Microchip Technology, PIC18F2539T-I/SO Datasheet - Page 14

IC MCU FLASH 12KX16 EE AD 28SOIC

PIC18F2539T-I/SO

Manufacturer Part Number
PIC18F2539T-I/SO
Description
IC MCU FLASH 12KX16 EE AD 28SOIC
Manufacturer
Microchip Technology
Series
PIC® 18Fr

Specifications of PIC18F2539T-I/SO

Core Processor
PIC
Core Size
8-Bit
Speed
40MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, LVD, POR, PWM, WDT
Number Of I /o
21
Program Memory Size
24KB (12K x 16)
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
1408 x 8
Voltage - Supply (vcc/vdd)
4.2 V ~ 5.5 V
Data Converters
A/D 5x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
28-SOIC (7.5mm Width)
Processor Series
PIC18F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
1408 B
Interface Type
I2C, SPI, AUSART
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
21
Number Of Timers
16 bit
Operating Supply Voltage
2 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
Development Tools By Supplier
DV164005, DV164136
Minimum Operating Temperature
- 40 C
On-chip Adc
5 bit
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
PIC18FXX39
3.3.1
All of the programming examples up to this point have
assumed that the device is blank prior to programming.
In fact, if the device is not blank, the direction has been
to completely erase the device via a Bulk Erase
operation (see Section 3.2).
It may be the case, however, that the user wishes to
modify only a section of an already programmed
device. In such a situation, erasing the entire device is
not a realistic option.
The minimum amount of data that can be written to the
device is 8 bytes. This is accomplished by placing the
device in Single Panel Write mode, loading the 8-byte
write buffer for the panel, and then initiating a write
sequence, as shown in Table 3-4. In this case,
however, it is assumed that the address space to be
written already has data in it (i.e., it is not blank).
The minimum amount of code memory that may be
erased at a given time is 64 bytes. Again, the device
must be placed in Single Panel Write mode. The
EECON1 register must then be used to erase the
64-byte target space prior to writing the data.
When using the EECON1 register to act on code
memory, the EEPGD bit must be set (EECON1<7> = 1)
and the CFGS bit must be cleared (EECON1<6> = 0).
The WREN bit must be set (EECON1<2> = 1) to enable
writes of any sort (e.g., erases), and this must be done
prior to initiating a write sequence. The FREE bit must
be set (EECON1<4> = 1) in order to erase the program
space being pointed to by the Table Pointer. The erase
sequence is initiated by the setting the WR bit
(EECON1<1> = 1). It is strongly recommended that the
WREN bit be set only when absolutely necessary.
To help prevent inadvertent writes when using the
EECON1 register, EECON2 is used to “enable” the WR
bit. This register must be sequentially loaded with 55h
and then, AAh, immediately prior to asserting the WR
bit in order for the write to occur.
The erase will begin on the falling edge of the 4th SCLK
after the WR bit is set.
After the erase sequence terminates, SCLK must still
be held low for the time specified by parameter P10 to
allow high voltage discharge of the memory array.
DS30480C-page 14
MODIFYING CODE MEMORY
Preliminary
FIGURE 3-7:
No
Start Write Sequence
Increment Address
Single Panel Write
High Until Done
and Hold SCLK
Pull SCLK Low
to Write Buffer
Delay P9 and
Load 8 Bytes
Delay P10
Device for
PROGRAM CODE
MEMORY FLOW
Configure
at <Addr>
locations
 2010 Microchip Technology Inc.
done?
Start
by 8
End
All
Yes

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