PIC18F2539T-I/SO Microchip Technology, PIC18F2539T-I/SO Datasheet - Page 3

• Manufacturer Part Number: PIC18F2539T-I/SO
• Description: IC MCU FLASH 12KX16 EE AD 28SOIC
• Manufacturer: Microchip Technology
• Series: PIC® 18Fr

Specifications of PIC18F2539T-I/SO

• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 40MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, LVD, POR, PWM, WDT
• Number Of I /o: 21
• Program Memory Size: 24KB (12K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 256 x 8
• Ram Size: 1408 x 8
• Voltage - Supply (vcc/vdd): 4.2 V ~ 5.5 V
• Data Converters: A/D 5x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 28-SOIC (7.5mm Width)
• Processor Series: PIC18F
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 1408 B
• Interface Type: I2C, SPI, AUSART
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 21
• Number Of Timers: 16 bit
• Operating Supply Voltage: 2 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
• Development Tools By Supplier: DV164005, DV164136
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 5 bit
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

2.3
The code memory space extends from 0000h to 5FFFh
(24 Kbytes) in three 8-Kbyte panels in PIC18FX539
parts. In PIC18FX439 parts, program space is from
0000h to 2FFFh (12 Kbytes). Addresses 0000h
through 01FFh, however, define a “Boot Block” region
that is treated separately from Panel 1. All code
memory is on-chip.
A user may store identification information (ID) in eight
ID registers. These ID registers are mapped in
addresses 200000h through 200007h. The ID locations
read out normally, even after code protection is applied.
Locations 300001h through 30000Dh are reserved for
the configuration bits. These bits may be set to select
various device options, and are described in
Section 5.0. These configuration bits read out normally,
even after code protected.
Locations 3FFFFEh and 3FFFFFh are reserved for the
device ID bits. These bits may be used by the
programmer to identify what device type is being
programmed, and are described in Section 5.0. These
configuration bits read out normally, even after code
protection.
FIGURE 2-2:
 2010 Microchip Technology Inc.
3FFFFEh
3FFFFFh
200000h
200001h
200002h
200003h
200004h
200005h
200006h
200007h
300000h
300001h
300002h
300003h
Memory Map
ID Location 1
ID Location 2
ID Location 3
ID Location 4
ID Location 5
ID Location 6
ID Location 7
ID Location 8
CONFIG1H
CONFIG2H
CONFIG1L
CONFIG2L
Device ID2
Device ID1
MEMORY MAP FOR PIC18FXX39
Preliminary
3FFFFFh
200000h
1FFFh
2FFFh
3FFFh
5FFFh
0000h
200h
TABLE 2-2:
2.3.1
Memory in the address space 000000h to 3FFFFFh is
addressed via the Table Pointer, which is comprised of
three pointer registers:
• TBLPTRU, at address 0FF8h
• TBLPTRH, at address 0FF7h
• TBLPTRL, at address 0FF6h
Unimplemented
Read as 0’s
Addr[21:16]
12 Kbytes
TBLPTRU
PIC18F2439
PIC18F2539
PIC18F4439
PIC18F4539
Boot Block
Panel 1
Panel 2
Device
MEMORY ADDRESS POINTER
IMPLEMENTATION OF CODE
MEMORY
PIC18FXX39
TBLPTRH
Addr[15:8]
Unimplemented
0000h - 2FFFh (12 Kbytes)
0000h - 5FFFh (24 Kbytes)
0000h - 2FFFh (12 Kbytes)
0000h - 5FFFh (24 Kbytes)
Read as 0’s
24 Kbytes
Code Memory Size
Boot Block
Panel 1
Panel 2
Panel 3
DS30480C-page 3
TBLPTRL
Addr[7:0]