PIC18F2539T-I/SO Microchip Technology, PIC18F2539T-I/SO Datasheet - Page 22

IC MCU FLASH 12KX16 EE AD 28SOIC

PIC18F2539T-I/SO

Manufacturer Part Number
PIC18F2539T-I/SO
Description
IC MCU FLASH 12KX16 EE AD 28SOIC
Manufacturer
Microchip Technology
Series
PIC® 18Fr

Specifications of PIC18F2539T-I/SO

Core Processor
PIC
Core Size
8-Bit
Speed
40MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, LVD, POR, PWM, WDT
Number Of I /o
21
Program Memory Size
24KB (12K x 16)
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
1408 x 8
Voltage - Supply (vcc/vdd)
4.2 V ~ 5.5 V
Data Converters
A/D 5x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
28-SOIC (7.5mm Width)
Processor Series
PIC18F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
1408 B
Interface Type
I2C, SPI, AUSART
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
21
Number Of Timers
16 bit
Operating Supply Voltage
2 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
Development Tools By Supplier
DV164005, DV164136
Minimum Operating Temperature
- 40 C
On-chip Adc
5 bit
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
PIC18FXX39
4.3
The verify step involves reading back the code memory
space and comparing against the copy held in the
programmer’s buffer. Memory reads occur a single byte
at a time, so two bytes must be read to compare
against the word in the programmer’s buffer. Refer to
Section 4.2 for implementation details of reading code
memory.
FIGURE 4-4:
4.4
A configuration address may be read and output on
SDATA via the 4-bit command, ‘1001’. Configuration
data is read and written in a byte-wise fashion, so it is
not necessary to merge two bytes into a word prior to a
compare. The result may then be immediately
compared to the appropriate configuration data in the
programmer’s memory for verification. Refer to
Section 4.2 for implementation details of reading
configuration data.
DS30480C-page 22
Verify Code Memory and ID
Locations
Verify Configuration Bits
No
Read High Byte
Read Low Byte
Set Pointer = 0
word = expect
VERIFY CODE MEMORY FLOW
code memory
verified?
data?
Does
Start
All
Yes
Yes
No
Failure,
Report
Error
Preliminary
The Table Pointer must be manually set to 200000h
(base address of the ID locations) once the code
memory has been verified. The post-increment feature
of the Table Read 4-bit command may not be used to
increment the Table Pointer beyond 1FFFFFh.
4.5
A data EEPROM address may be read via a sequence
of core instructions (4-bit command, ‘0000’) and then
output on SDATA via the 4-bit command, ‘0010’ (shift
out data holding register). The result may then be
immediately compared to the appropriate data in the
programmer’s memory for verification. Refer to
Section 4.1 for implementation details of reading data
EEPROM.
No
Verify Data EEPROM
Set Pointer = 200000h
Read High Byte
Read Low Byte
word = expect
ID locations
verified?
data?
Does
Done
All
Yes
Yes
 2010 Microchip Technology Inc.
No
Failure,
Report
Error

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