ATMEGA169-16MI Atmel, ATMEGA169-16MI Datasheet - Page 65

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ATMEGA169-16MI

Manufacturer Part Number
ATMEGA169-16MI
Description
IC AVR MCU 16K 16MHZ IND 64-QFN
Manufacturer
Atmel
Series
AVR® ATmegar
Datasheets

Specifications of ATMEGA169-16MI

Core Processor
AVR
Core Size
8-Bit
Speed
16MHz
Connectivity
SPI, UART/USART, USI
Peripherals
Brown-out Detect/Reset, LCD, POR, PWM, WDT
Number Of I /o
54
Program Memory Size
16KB (8K x 16)
Program Memory Type
FLASH
Eeprom Size
512 x 8
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
64-MLF®, 64-QFN
For Use With
ATAVRBFLY - KIT EVALUATION AVR BUTTERFLYATSTK502 - MOD EXPANSION AVR STARTER 500
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
2514P–AVR–07/06
• SS/PCINT8 – Port B, Bit 0
SS: Slave Port Select input. When the SPI is enabled as a Slave, this pin is configured
as an input regardless of the setting of DDB0. As a Slave, the SPI is activated when this
pin is driven low. When the SPI is enabled as a Master, the data direction of this pin is
controlled by DDB0. When the pin is forced to be an input, the pull-up can still be con-
trolled by the PORTB0 bit
PCINT8, Pin Change Interrupt Source 8: The PB0 pin can serve as an external interrupt
source.
Table 31 and Table 32 relate the alternate functions of Port B to the overriding signals
shown in Figure 26 on page 60. SPI MSTR INPUT and SPI SLAVE OUTPUT constitute
the MISO signal, while MOSI is divided into SPI MSTR OUTPUT and SPI SLAVE
INPUT.
Table 31. Overriding Signals for Alternate Functions in PB7..PB4
Signal
Name
PUOE
PUOV
DDOE
DDOV
PVOE
PVOV
PTOE
DIEOE
DIEOV
DI
AIO
PB7/OC2A/
PCINT15
0
0
0
0
OC2A
PCINT15 •
PCIE1
1
PCINT15 INPUT
OC2A ENABLE
PB6/OC1B/
PCINT14
0
0
0
0
OC1B ENABLE
OC1B
PCINT14 • PCIE1
1
PCINT14 INPUT
PB5/OC1A/
PCINT13
0
0
0
0
OC1A ENABLE
OC1A
PCINT13 • PCIE1
1
PCINT13 INPUT
ATmega169/V
PB4/OC0A/
PCINT12
0
0
0
0
OC0A ENABLE
OC0A
PCINT12 •
PCIE1
1
PCINT12 INPUT
65

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