PIC16LF819T-E/SO Microchip Technology, PIC16LF819T-E/SO Datasheet - Page 185

IC PIC MCU FLASH 2KX14 18SOIC

PIC16LF819T-E/SO

Manufacturer Part Number
PIC16LF819T-E/SO
Description
IC PIC MCU FLASH 2KX14 18SOIC
Manufacturer
Microchip Technology
Series
PIC® 16Fr
Datasheets

Specifications of PIC16LF819T-E/SO

Core Processor
PIC
Core Size
8-Bit
Speed
10MHz
Connectivity
I²C, SPI
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
16
Program Memory Size
3.5KB (2K x 14)
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
256 x 8
Voltage - Supply (vcc/vdd)
2 V ~ 5.5 V
Data Converters
A/D 5x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
18-SOIC (7.5mm Width)
Lead Free Status / RoHS Status
Request inventory verification / Request inventory verification
16.6
Figure 16-4 shows the operation of the A/D Converter
after the GO/DONE bit has been set and the
ACQT2:ACQT0 bits are cleared. A conversion is
started after the following instruction to allow entry into
Sleep mode before the conversion begins.
Figure 16-5 shows the operation of the A/D Converter
after
ACQT2:ACQT0 bits are set to ‘010’ and selecting a
4 T
Clearing the GO/DONE bit during a conversion will
abort the current conversion. The A/D Result register
pair will NOT be updated with the partially completed
A/D
ADRESH:ADRESL registers will continue to contain
the value of the last completed conversion (or the last
value written to the ADRESH:ADRESL registers).
FIGURE 16-4:
FIGURE 16-5:
© 2008 Microchip Technology Inc.
(Holding capacitor continues
acquiring input)
Set GO/DONE bit
AD
1
acquisition time before the conversion starts.
the
T
conversion
CY
Set GO/DONE bit
A/D Conversions
Holding capacitor is disconnected from analog input (typically 100 ns)
T
ACQ
Acquisition
- T
Automatic
2
GO/DONE
Time
AD
Conversion starts
Cycles
T
AD
3
1 T
sample.
A/D CONVERSION T
A/D CONVERSION T
AD
b9
4
bit
2 T
Conversion starts
(Holding capacitor is disconnected)
has
AD
b8
1
This
3 T
been
AD
b9
b7
2
means
4 T
set,
On the following cycle:
ADRESH:ADRESL is loaded, GO/DONE bit is cleared,
ADIF bit is set, holding capacitor is connected to analog input.
AD
b8
3
b6
AD
AD
5 T
On the following cycle:
ADRESH:ADRESL is loaded, GO/DONE bit is cleared,
ADIF bit is set, holding capacitor is connected to analog input.
CYCLES (ACQT<2:0> = 000, T
CYCLES (ACQT<2:0> = 010, T
the
the
AD
b5
b7
4
6 T
AD
T
b4
5
b6
AD
7 T
Cycles
After the A/D conversion is completed or aborted, a
2 T
started. After this wait, acquisition on the selected
channel is automatically started.
16.7
The discharge phase is used to initialize the value of
the capacitor array. The array is discharged before
every sample. This feature helps to optimize the unity-
gain amplifier as the circuit always needs to charge the
capacitor array, rather than charge/discharge based on
previous measurement values.
AD
Note:
b3
b5
6
AD
8
wait is required before the next acquisition can be
T
AD
b4
Discharge
b2
PIC18F2450/4450
7
9 T
The GO/DONE bit should NOT be set in
the same instruction that turns on the A/D.
AD
b3
b1
8
10
T
AD
ACQ
b0
b2
9
ACQ
11
= 0)
T
AD
= 4 T
10
Discharge
b1
1
AD
DS39760D-page 183
b0
11
)
T
Discharge
AD
1

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