DSPIC30F5016-20I/PT Microchip Technology, DSPIC30F5016-20I/PT Datasheet - Page 18
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DSPIC30F5016-20I/PT
Manufacturer Part Number
DSPIC30F5016-20I/PT
Description
IC DSPIC MCU/DSP 66K 80TQFP
Manufacturer
Microchip Technology
Series
dsPIC™ 30Fr
Datasheets
1.DSPIC30F2011-20ISO.pdf
(66 pages)
2.DSPIC30F5011T-20IPT.pdf
(34 pages)
3.DSPIC30F6010T-20IPF.pdf
(6 pages)
4.DSPIC30F5016-20IPT.pdf
(100 pages)
Specifications of DSPIC30F5016-20I/PT
Core Processor
dsPIC
Core Size
16-Bit
Speed
20 MIPS
Connectivity
CAN, I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, Motor Control PWM, QEI, POR, PWM, WDT
Number Of I /o
68
Program Memory Size
66KB (22K x 24)
Program Memory Type
FLASH
Eeprom Size
1K x 8
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
2.5 V ~ 5.5 V
Data Converters
A/D 16x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
80-TFQFP
For Use With
AC164320 - MODULE SKT MPLAB PM3 80TQFPAC30F007 - MODULE SKT FOR DSPIC30F 80TQFP
Lead Free Status / RoHS Status
Request inventory verification / Request inventory verification
Other names
DSPIC30F501620IPT
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
DSPIC30F5016-20I/PT
Manufacturer:
Microchip Technology
Quantity:
10 000
dsPIC30F Family Reference Manual
34. Page 18-27, Section 18.15 A/D Sampling
The entire Section 18.15 should be replaced with the
following text and figures:
DS80169E-page 18
Requirements
The analog input model of the 12-bit A/D converter is shown in Figure 18-11. The total sampling
time for the A/D is a function of the internal amplifier settling time and the holding capacitor
charge time.
For the A/D converter to meet its specified accuracy, the charge holding capacitor (C
be allowed to fully charge to the voltage level on the analog input pin. The source impedance
(R
combine to directly affect the time required to charge the capacitor C
ance of the analog sources must therefore be small enough to fully charge the holding capacitor
within the chosen sample time. To minimize the effects of pin leakage currents on the accuracy
of the A/D converter, the maximum recommended source impedance, R
analog input channel is selected (changed), this sampling function must be completed prior to
starting the conversion. The internal holding capacitor will be in a discharged state prior to each
sample operation.
At least 1 T
details, see the device electrical specifications.
Figure 18-11:
Note: C
S
), the interconnect impedance (R
Legend: C
VA
PIN
Rs
AD
value depends on device package and is not tested. Effect of C
time period should be allowed between conversions for the sample time. For more
V
I leakage
R
R
C
ANx
T
PIN
IC
SS
HOLD
C
12-bit A/D Converter Analog Input Model
PIN
= input capacitance
= threshold voltage
= leakage current at the pin due to
= interconnect resistance
= sampling switch resistance
= sample/hold capacitance (from DAC)
various junctions
V
DD
V
V
T
T
= 0.6V
= 0.6V
IC
), and the internal sampling switch (R
R
I leakage
IC
500 nA
250
Sampling
Switch
R
2004 Microchip Technology Inc.
SS
HOLD
PIN
R
negligible if Rs
. The combined imped-
SS
V
S
SS
C
= DAC capacitance
= 18 pF
, is 2.5 k . After the
HOLD
3 k
SS
) impedance
HOLD
2.5 k .
) must