MC68HC908SR12CFA Freescale Semiconductor, MC68HC908SR12CFA Datasheet - Page 291

• Manufacturer Part Number: MC68HC908SR12CFA
• Description: MICROCONTROLLER 48 PIN
• Manufacturer: Freescale Semiconductor
• Series: HC08r

Specifications of MC68HC908SR12CFA

• Core Processor: HC08
• Core Size: 8-Bit
• Speed: 8MHz
• Connectivity: I²C, SCI
• Peripherals: LVD, POR, PWM, Temp Sensor
• Number Of I /o: 31
• Program Memory Size: 12KB (12K x 8)
• Program Memory Type: FLASH
• Ram Size: 512 x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 14x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 48-LQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Other names: Q1145673

17.1 Contents
MC68HC908SR12•MC68HC08SR12 — Rev. 5.0
Freescale Semiconductor
Data Sheet — MC68HC908SR12•MC68HC08SR12
Section 17. Multi-Master IIC Interface (MMIIC)
17.2
17.3
17.4
17.5
17.6
17.6.1
17.6.2
17.6.3
17.6.4
17.6.5
17.6.6
17.6.7
17.6.8
17.6.9
17.7
17.7.1
17.7.2
17.7.3
17.7.4
17.7.5
17.7.6
17.7.7
17.7.8
17.8
17.8.1
17.9
Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 292
Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 293
I/O Pins . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 293
Multi-Master IIC System Configuration . . . . . . . . . . . . . . . . . . 295
Multi-Master IIC Bus Protocol . . . . . . . . . . . . . . . . . . . . . . . . . 295
MMIIC I/O Registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 299
SMBus Protocols with PEC and without PEC. . . . . . . . . . . . . 313
Program Algorithm. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 311
START Signal. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 296
Slave Address Transmission . . . . . . . . . . . . . . . . . . . . . . .296
Data Transfer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 296
Repeated START Signal . . . . . . . . . . . . . . . . . . . . . . . . . . 297
STOP Signal. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 297
Arbitration Procedure . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 297
Clock Synchronization . . . . . . . . . . . . . . . . . . . . . . . . . . . . 298
Handshaking . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 298
Packet Error Code . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 299
MMIIC Address Register (MMADR) . . . . . . . . . . . . . . . . . . 299
MMIIC Control Register 1 (MMCR1) . . . . . . . . . . . . . . . . . 301
MMIIC Control Register 2 (MMCR2) . . . . . . . . . . . . . . . . . 303
MMIIC Status Register (MMSR). . . . . . . . . . . . . . . . . . . . . 305
MMIIC Data Transmit Register (MMDTR) . . . . . . . . . . . . . 307
MMIIC Data Receive Register (MMDRR). . . . . . . . . . . . . . 308
MMIIC CRC Data Register (MMCRCDR). . . . . . . . . . . . . . 309
MMIIC Frequency Divider Register (MMFDR) . . . . . . . . . . 310
Data Sequence. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .312
Multi-Master IIC Interface (MMIIC)
Data Sheet
291