MC68HC908SR12CFA Freescale Semiconductor, MC68HC908SR12CFA Datasheet - Page 76

• Manufacturer Part Number: MC68HC908SR12CFA
• Description: MICROCONTROLLER 48 PIN
• Manufacturer: Freescale Semiconductor
• Series: HC08r

Specifications of MC68HC908SR12CFA

• Core Processor: HC08
• Core Size: 8-Bit
• Speed: 8MHz
• Connectivity: I²C, SCI
• Peripherals: LVD, POR, PWM, Temp Sensor
• Number Of I /o: 31
• Program Memory Size: 12KB (12K x 8)
• Program Memory Type: FLASH
• Ram Size: 512 x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 14x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 48-LQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Other names: Q1145673

Configuration and Mask Option
Data Sheet
76
NOTE:
NOTE:
Configuration and Mask Option Registers (CONFIG & MOR) Freescale Semiconductor
LVIRSTD — LVI Reset Disable
LVIPWRD — LVI Power Disable Bit
LVI5OR3 — LVI 5V or 3V Operating Mode
SSREC — Short Stop Recovery
Exiting stop mode by pulling reset will result in the long stop recovery.
If using an external crystal oscillator, and it is disabled during stop mode
(STOP_XCLKEN=0), do not set the SSREC bit.
When the LVI is disabled in stop mode (LVISTOP=0), the system
stabilization time for long stop recovery (4096 ICLK cycles) gives a delay
longer than the LVI’s turn-on time. There is no period where the MCU is
not protected from a low power condition. However, when using the
short stop recovery configuration option, the 32 ICLK delay is less than
the LVI’s turn-on time and there exists a period in start-up where the LVI
is not protecting the MCU.
LVIRSTD disables the reset signal from the LVI module. (See
Section 22. Low-Voltage Inhibit
LVIPWRD disables the LVI module. (See
Inhibit
LVI5OR3 selects the voltage operating mode of the LVI module. (See
Section 22. Low-Voltage Inhibit
for the LVI should match the operating V
Electrical Specifications
the modes.
SSREC enables the CPU to exit stop mode with a delay of 32 ICLK
cycles instead of a 4096 ICLK cycle delay.
1 = LVI module resets disabled
0 = LVI module resets enabled
1 = LVI module power disabled
0 = LVI module power enabled
1 = LVI operates in 5V mode
0 = LVI operates in 3V mode
1 = Stop mode recovery after 32 ICLK cycles
0 = Stop mode recovery after 4096 ICLK cycles
(LVI).)
for the LVI voltage trip points for each of
MC68HC908SR12•MC68HC08SR12 — Rev. 5.0
(LVI).) The voltage mode selected
(LVI).)
DD
Section 22. Low-Voltage
.
See Section 24.