MC68HC908SR12CFA Freescale Semiconductor, MC68HC908SR12CFA Datasheet - Page 87

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MC68HC908SR12CFA

Manufacturer Part Number
MC68HC908SR12CFA
Description
MICROCONTROLLER 48 PIN
Manufacturer
Freescale Semiconductor
Series
HC08r
Datasheet

Specifications of MC68HC908SR12CFA

Core Processor
HC08
Core Size
8-Bit
Speed
8MHz
Connectivity
I²C, SCI
Peripherals
LVD, POR, PWM, Temp Sensor
Number Of I /o
31
Program Memory Size
12KB (12K x 8)
Program Memory Type
FLASH
Ram Size
512 x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 14x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
48-LQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Other names
Q1145673

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MC68HC908SR12CFA
Manufacturer:
MOTOROLA/摩托罗拉
Quantity:
20 000
MC68HC908SR12•MC68HC08SR12 — Rev. 5.0
Freescale Semiconductor
NOTE:
I — Interrupt Mask
To maintain M6805 Family compatibility, the upper byte of the index
register (H) is not stacked automatically. If the interrupt service routine
modifies H, then the user must stack and unstack H using the PSHH and
PULH instructions.
N — Negative flag
Z — Zero flag
When the interrupt mask is set, all maskable CPU interrupts are
disabled. CPU interrupts are enabled when the interrupt mask is
cleared. When a CPU interrupt occurs, the interrupt mask is set
automatically after the CPU registers are saved on the stack, but
before the interrupt vector is fetched.
After the I bit is cleared, the highest-priority interrupt request is
serviced first.
A return-from-interrupt (RTI) instruction pulls the CPU registers from
the stack and restores the interrupt mask from the stack. After any
reset, the interrupt mask is set and can be cleared only by the clear
interrupt mask software instruction (CLI).
The CPU sets the negative flag when an arithmetic operation, logic
operation, or data manipulation produces a negative result, setting bit
7 of the result.
The CPU sets the zero flag when an arithmetic operation, logic
operation, or data manipulation produces a result of $00.
1 = Interrupts disabled
0 = Interrupts enabled
1 = Negative result
0 = Non-negative result
1 = Zero result
0 = Non-zero result
Central Processor Unit (CPU)
Central Processor Unit (CPU)
CPU Registers
Data Sheet
87

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