MC68HC908SR12CFA Freescale Semiconductor, MC68HC908SR12CFA Datasheet - Page 301

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MC68HC908SR12CFA

Manufacturer Part Number
MC68HC908SR12CFA
Description
MICROCONTROLLER 48 PIN
Manufacturer
Freescale Semiconductor
Series
HC08r
Datasheet

Specifications of MC68HC908SR12CFA

Core Processor
HC08
Core Size
8-Bit
Speed
8MHz
Connectivity
I²C, SCI
Peripherals
LVD, POR, PWM, Temp Sensor
Number Of I /o
31
Program Memory Size
12KB (12K x 8)
Program Memory Type
FLASH
Ram Size
512 x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 14x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
48-LQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Other names
Q1145673

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MC68HC908SR12CFA
Manufacturer:
MOTOROLA/摩托罗拉
Quantity:
20 000
17.7.2
MC68HC908SR12•MC68HC08SR12 — Rev. 5.0
Freescale Semiconductor
MMIIC
Control Register 1 (MMCR1)
Address:
MMEN — MMIIC Enable
MMIEN — MMIIC Interrupt Enable
MMCLRBB — MMIIC Clear Busy Flag
Reset:
Read:
Write:
This bit is set to enable the Multi-master IIC module. When
MMEN = 0, module is disabled and all flags will restore to its power-
on default states. Reset clears this bit.
When this bit is set, the MMTXIF, MMRXIF, MMALIF, and MMNAKIF
flags are enabled to generate an interrupt request to the CPU. When
MMIEN is cleared, the these flags are prevented from generating an
interrupt request. Reset clears this bit.
Writing a logic 1 to this write-only bit clears the MMBB flag.
MMCLRBB always reads as a logic 0. Reset clears this bit.
1 = MMIIC module enabled
0 = MMIIC module disabled
1 = MMTXIF, MMRXIF, MMALIF, and/or MMNAKIF bit set will
0 = MMTXIF, MMRXIF, MMALIF, and/or MMNAKIF bit set will not
1 = Clear MMBB flag
0 = No affect on MMBB flag
MMEN
$0049
Bit 7
Figure 17-5. MMIIC Control Register 1 (MMCR1)
generate interrupt request to CPU
generate interrupt request to CPU
Multi-Master IIC Interface (MMIIC)
0
= Unimplemented
MMIEN
6
0
MMCLRBB
5
0
0
4
0
0
MMTXAK REPSEN
3
0
Multi-Master IIC Interface (MMIIC)
2
0
MMIIC I/O Registers
MMCRCBYTE
1
0
Data Sheet
SDASCL1
Bit 0
0
301

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