MC68HC705JP7CDW Freescale Semiconductor, MC68HC705JP7CDW Datasheet - Page 58

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MC68HC705JP7CDW

Manufacturer Part Number
MC68HC705JP7CDW
Description
IC MCU 8BIT 28-SOIC
Manufacturer
Freescale Semiconductor
Series
HC05r
Datasheet

Specifications of MC68HC705JP7CDW

Core Processor
HC05
Core Size
8-Bit
Speed
2.1MHz
Connectivity
SIO
Peripherals
POR, Temp Sensor, WDT
Number Of I /o
22
Program Memory Size
6KB (6K x 8)
Program Memory Type
OTP
Ram Size
224 x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 4x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
28-SOIC (7.5mm Width)
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Parallel Input/Output
7.3 Port B
Port B is an 8-bit, general-purpose, bidirectional I/O port with these features:
7.3.1 Port B Data Register
The port B data register (PORTB) contains a bit for each of the port B pins. When a port B pin is
programmed to be an output, the state of its data register bit determines the state of the output pin. When
a port B pin is programmed to be an input, reading the port B data register returns the logic state of the
pin. Reset has no effect on port B data.
58
Programmable pulldown devices
PB0–PB4 are shared with the analog subsystem.
PB3 and PB4 are shared with the 16-bit programmable timer.
PB4 can be driven directly by the output of comparator 1.
PB5–PB7 are shared with the simple serial interface (SIOP).
High current sinking capability on the PB4 pin
High current sourcing capability on the PB4 pin
WRITE $0000
WRITE $0004
WRITE $0010
READ $0004
READ $0000
RESET
Alternate:
Alternate:
Alternate:
Address:
Reset:
Read:
Write:
MC68HC705JJ7 • MC68HC705JP7 Advance Information Data Sheet, Rev. 4.1
$0001
Bit 7
SCK
SCK
SCK
PB7
R
R
Figure 7-5. Port B Data Register (PORTB)
PORT A DATA
REGISTER
DATA DIRECTION
REGISTER A
BIT PAx
PULLDOWN
REGISTER A
BIT PDIAx
PB6
BIT DDRAx
SDI
SDI
SDI
6
Figure 7-4. Port A I/O Circuit
SDO
SDO
SDO
PB5
5
Unaffected by reset
TCMP
CMP1
PB4
AN4
4
MASK OPTION REG. ($1FF1)
TCAP
TCAP
PB3
AN3
3
PB2
AN2
AN2
AN2
2
AN1
AN1
AN1
PB1
1
INTERRUPT
EXTERNAL
REQUEST
(PA0:3)
Freescale Semiconductor
PULLDOWN
DEVICE
HIGH SINK/SOURCE
Bit 0
PB0
AN0
AN0
AN0
PAx
CAPABILITY
CURRENT

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