MC68HC908JB8JDW Freescale Semiconductor, MC68HC908JB8JDW Datasheet - Page 136

IC MCU 8K FLASH 3MHZ 20-SOIC

MC68HC908JB8JDW

Manufacturer Part Number
MC68HC908JB8JDW
Description
IC MCU 8K FLASH 3MHZ 20-SOIC
Manufacturer
Freescale Semiconductor
Series
HC08r
Datasheet

Specifications of MC68HC908JB8JDW

Core Processor
HC08
Core Size
8-Bit
Speed
3MHz
Connectivity
USB
Peripherals
LVD, POR, PWM
Number Of I /o
13
Program Memory Size
8KB (8K x 8)
Program Memory Type
FLASH
Ram Size
256 x 8
Voltage - Supply (vcc/vdd)
4 V ~ 5.5 V
Oscillator Type
Internal
Operating Temperature
0°C ~ 70°C
Package / Case
20-SOIC (7.5mm Width)
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Data Converters
-

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Universal Serial Bus Module (USB)
9.7.2.5 Data Signal Rise and Fall Time
Technical Data
136
For low-speed transmissions, the jitter time for any consecutive
differential data transitions must be within
any set of paired differential data transitions. These jitter numbers
include timing variations due to differential buffer delay, rise/fall time
mismatches, internal clock source jitter, noise and other random effects.
The output rise time and fall time are measured between 10% and 90%
of the signal. Edge transition time for the rising and falling edges of
low-speed signals is 75ns (minimum) into a capacitive load (C
200pF and 300ns (maximum) into a capacitive load of 600pF. The rising
and falling edges should be transitioning (monotonic) smoothly when
driving the cable to avoid excessive EMI.
DIFFERENTIAL
DATA LINES
t
Period
JITTER
Universal Serial Bus Module (USB)
Figure 9-14. Data Signal Rise and Fall Time
+
+
C
C
L
L
MC68HC908JB8•MC68HC08JB8•MC68HC08JT8 — Rev. 2.3
DIFFERENTIAL
DATA LINES
CONSECUTIVE
TRANSITIONS
Figure 9-13. Data Jitter
LOW SPEED: 75ns at C
10%
TRANSITIONS
RISE TIME
PAIRED
t
R
±
CROSSOVER
90%
25ns and within
POINTS
L
= 200pF, 300ns at C
Freescale Semiconductor
90%
FALL TIME
t
L
F
= 600 pF
10%
±
10ns for
L
) of

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