MC68HC908GP32CB Freescale Semiconductor, MC68HC908GP32CB Datasheet - Page 35

• Manufacturer Part Number: MC68HC908GP32CB
• Description: IC MCU 32K FLASH 8MHZ 42-SDIP
• Manufacturer: Freescale Semiconductor
• Series: HC08r

Specifications of MC68HC908GP32CB

• Core Processor: HC08
• Core Size: 8-Bit
• Speed: 8MHz
• Connectivity: SCI, SPI
• Peripherals: LVD, POR, PWM
• Number Of I /o: 33
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: FLASH
• Ram Size: 512 x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 8x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 42-DIP (0.600", 15.24mm)
• For Use With: M68EVB908GP32 - BOARD EVALUATION FOR HC908GP32
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -

Freescale Semiconductor
Addr.
$003C
$003D
$FE00
$FE01
$FE02
$FE03
$FE04
$FE05
$FE06
$FE07
$003A
$003B
$003E
$003F
Analog-to-Digital Status and
Note: Writing a logic 0 clears SBSW.
SIM Break Status Register
SIM Reset Status Register
Interrupt Status Register 1
Interrupt Status Register 2
Interrupt Status Register 3
SIM Upper Byte Address
Register Name
PLL VCO Range Select
SIM Break Flag Control
Analog-to-Digital Clock
PLL Reference Divider
Analog-to-Digital Data
Control Register
Unimplemented
Select Register
Figure 2-2. Control, Status, and Data Registers (Sheet 5 of 6)
Reserved
(ADSCR)
(SUBAR)
(ADCLK)
(SBFCR)
Register
Register
Register
Register
Register
(PMRS)
(PMDS)
(SRSR)
(SBSR)
(INT1)
(INT2)
(INT3)
(ADR)
Reset:
Reset:
Reset:
Reset:
Reset:
Reset:
Reset:
Reset:
Reset:
Reset:
Reset:
Reset:
Reset:
Read:
Read:
Read:
Read:
Read:
Read:
Read:
Read:
Read:
Read:
Read:
Read:
Read:
Read:
Write:
Write:
Write:
Write:
Write:
Write:
Write:
Write:
Write:
Write:
Write:
Write:
Write:
Write:
POR:
COCO
ADIV2
Bit 7
VRS7
BCFE
POR
MC68HC908GP32 Data Sheet, Rev. 10
AD7
IF14
IF6
R
R
R
R
R
R
R
0
0
0
0
0
0
1
0
0
0
0
0
0
= Unimplemented
ADIV1
VRS6
AIEN
AD6
IF13
PIN
IF5
6
R
R
R
R
R
R
R
1
0
0
0
0
0
0
0
0
0
0
0
ADCO
ADIV0
VRS5
COP
AD5
IF12
IF4
5
R
R
R
R
R
R
R
0
0
0
0
0
0
0
0
0
0
0
0
R = Reserved
ADICLK
ADCH4
VRS4
ILOP
AD4
IF11
IF3
4
R
R
R
R
R
R
R
0
0
0
1
0
0
0
0
0
0
0
0
ADCH3
RDS3
VRS3
ILAD
IF10
AD3
IF2
R
R
R
R
R
R
R
3
0
0
1
0
0
0
0
0
0
0
0
0
MODRST
ADCH2
RDS2
VRS2
AD2
IF1
IF9
Input/Output (I/O) Section
R
R
R
R
R
R
R
U = Unaffected
2
0
0
1
0
0
0
0
0
0
0
0
0
ADCH1
SBSW
VRS1
RDS1
Note
IF16
AD1
LVI
IF8
1
R
R
R
R
R
R
0
0
1
0
0
0
0
0
0
0
0
0
0
ADCH0
Bit 0
VRS0
RDS0
AD0
IF15
IF7
R
R
R
R
R
R
R
0
1
1
0
0
0
0
0
0
0
0
0
0
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