MC68HC908GP32CB Freescale Semiconductor, MC68HC908GP32CB Datasheet - Page 56

• Manufacturer Part Number: MC68HC908GP32CB
• Description: IC MCU 32K FLASH 8MHZ 42-SDIP
• Manufacturer: Freescale Semiconductor
• Series: HC08r

Specifications of MC68HC908GP32CB

• Core Processor: HC08
• Core Size: 8-Bit
• Speed: 8MHz
• Connectivity: SCI, SPI
• Peripherals: LVD, POR, PWM
• Number Of I /o: 33
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: FLASH
• Ram Size: 512 x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 8x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 42-DIP (0.600", 15.24mm)
• For Use With: M68EVB908GP32 - BOARD EVALUATION FOR HC908GP32
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -

Analog-to-Digital Converter (ADC)
4.6.2 ADC Analog Ground Pin (V
The ADC analog portion uses V
potential as V
4.6.3 ADC Voltage In (V
V
4.7 I/O Registers
These I/O registers control and monitor ADC operation:
4.7.1 ADC Status and Control Register
Function of the ADC status and control register (ADSCR) is described here.
COCO — Conversions Complete Bit
AIEN — ADC Interrupt Enable Bit
56
ADIN
•
•
•
In non-interrupt mode (AIEN = 0), COCO is a read-only bit that is set at the end of each conversion.
COCO will stay set until cleared by a read of the ADC data register. Reset clears this bit.
In interrupt mode (AIEN = 1), COCO is a read-only bit that is not set at the end of a conversion. It
always reads as a 0.
When this bit is set, an interrupt is generated at the end of an ADC conversion. The interrupt signal is
cleared when the data register is read or the status/control register is written. Reset clears the AIEN bit.
1 = Conversion completed (AIEN = 0)
0 = Conversion not completed (AIEN = 0) or CPU interrupt enabled (AIEN = 1)
1 = ADC interrupt enabled
0 = ADC interrupt disabled
is the input voltage signal from one of the eight ADC channels to the ADC module.
ADC status and control register (ADSCR)
ADC data register (ADR)
ADC clock register (ADCLK)
SS
Address:
The write function of the COCO bit is reserved. When writing to the ADSCR
register, always have a 0 in the COCO bit position.
Reset:
Read:
.
Write:
COCO
$003C
Figure 4-2. ADC Status and Control Register (ADSCR)
Bit 7
R
R
0
ADIN
Route V
= Reserved
SSAD
AIEN
)
6
0
MC68HC908GP32 Data Sheet, Rev. 10
SSAD
as its ground pin. Connect the V
SSAD
ADCO
cleanly to avoid any offset errors.
5
0
)/ADC Voltage Reference Low Pin (V
NOTE
NOTE
ADCH4
4
1
ADCH3
3
1
ADCH2
2
1
SSAD
pin to the same voltage
ADCH1
1
1
Freescale Semiconductor
ADCH0
Bit 0
REFL
1
)