MC68HC908GP32CB Freescale Semiconductor, MC68HC908GP32CB Datasheet - Page 83

• Manufacturer Part Number: MC68HC908GP32CB
• Description: IC MCU 32K FLASH 8MHZ 42-SDIP
• Manufacturer: Freescale Semiconductor
• Series: HC08r

Specifications of MC68HC908GP32CB

• Core Processor: HC08
• Core Size: 8-Bit
• Speed: 8MHz
• Connectivity: SCI, SPI
• Peripherals: LVD, POR, PWM
• Number Of I /o: 33
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: FLASH
• Ram Size: 512 x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 8x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 42-DIP (0.600", 15.24mm)
• For Use With: M68EVB908GP32 - BOARD EVALUATION FOR HC908GP32
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -

LVI5OR3 — LVI 5-V or 3-V Operating Mode Bit
SSREC — Short Stop Recovery Bit
STOP — STOP Instruction Enable Bit
COPD — COP Disable Bit
Freescale Semiconductor
LVI5OR3 selects the voltage operating mode of the LVI module. (See
(LVI).) The voltage mode selected for the LVI should match the operating V
Electrical Specifications
SSREC enables the CPU to exit stop mode with a delay of 32 CGMXCLK cycles instead of a
4096-CGMXCLK cycle delay.
STOP enables the STOP instruction.
COPD disables the COP module. (See
1 = LVI operates in 5-V mode.
0 = LVI operates in 3-V mode.
1 = Stop mode recovery after 32 CGMXCLK cycles
0 = Stop mode recovery after 4096 CGMXCLKC cycles
1 = STOP instruction enabled
0 = STOP instruction treated as illegal opcode
1 = COP module disabled
0 = COP module enabled
Exiting stop mode by pulling reset will result in the long stop recovery.
If using an external crystal oscillator, do not set the SSREC bit.
When the LVISTOP is enabled, the system stabilization time for power on
reset and long stop recovery (both 4096 CGMXCLK cycles) gives a delay
longer than the enable time for the LVI. There is no period where the MCU
is not protected from a low power condition. However, when using the short
stop recovery configuration option, the 32-CGMXCLK delay is less than the
LVI’s turn-on time and there exists a period in startup where the LVI is not
protecting the MCU.
for the LVI’s voltage trip points for each of the modes.
MC68HC908GP32 Data Sheet, Rev. 10
Chapter 7 Computer Operating Properly
NOTE
NOTE
Chapter 11 Low-Voltage Inhibit
DD
.
See Chapter 19
Functional Description
(COP).)
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