M30280F6HP#D7 Renesas Electronics America, M30280F6HP#D7 Datasheet - Page 109

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M30280F6HP#D7

Manufacturer Part Number
M30280F6HP#D7
Description
MCU 3/5V 48K I-TEMP 80-LQFP
Manufacturer
Renesas Electronics America
Series
M16C™ M16C/Tiny/28r
Datasheet

Specifications of M30280F6HP#D7

Core Processor
M16C/60
Core Size
16-Bit
Speed
20MHz
Connectivity
I²C, IEBus, SIO, UART/USART
Peripherals
DMA, POR, PWM, Voltage Detect, WDT
Number Of I /o
71
Program Memory Size
48KB (48K x 8)
Program Memory Type
FLASH
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 24x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
80-LQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-

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R
R
M
10.1 Count Source Protective Mode
e
E
1
. v
Figure 10.2 WDC Register and WDTS Register
J
6
0
In this mode, a on-chip oscillator clock is used for the watchdog timer count source. The watchdog timer
can be kept being clocked even when CPU clock stops as a result of run-away.
Before this mode can be used, the following register settings are required:
(1) Set the PRC1 bit in the PRCR register to “1” (enable writes to PM1 and PM2 registers).
(2) Set the PM12 bit in the PM1 register to “1” (reset when the watchdog timer underflows).
(3) Set the PM22 bit in the PM2 register to “1” (on-chip oscillator clock used for the watchdog timer count source).
(4) Set the PRC1 bit in the PRCR register to “0” (disable writes to PM1 and PM2 registers).
(5) Write to the WDTS register (watchdog timer starts counting).
Setting the PM22 bit to “1” results in the following conditions
• The on-chip oscillator continues oscillating even if the CM21 bit in the CM2 register is set to "0" (main clock
• The on-chip oscillator starts oscillating, and the on-chip oscillator clock becomes the watchdog timer
Watchdog timer period =
• The CM10 bit in the CM1 register is disabled against write. (Writing a “1” has no effect, nor is stop mode entered.)
• The watchdog timer does not stop when in wait mode.
C
2
9
or PLL clock) (system clock of count source selected by the CM21 bit is valid)
0 .
2 /
B
count source.
0
0
8
0
4
G
J
7
Watchdog Timer Control Register
a
b7
Watchdog Timer Start Register
b7
o r
0 -
. n
u
2
b6
0
3
p
0
, 1
0
(
b5
0
M
2
0
1
b4
0
6
7
C
b3
2 /
, 8
b2
page 87
M
b1
1
6
b0
b0
C
Watchdog timer count (32768)
f o
2 /
The watchdog timer is initialized and starts counting after a write instruction to
this register. The watchdog timer value is always initialized to “7FFF
regardless of whatever value is written.
On-chip oscillator clock
Bit Symbol
8
(b4-b0)
3
WDC7
) B
8
(b5)
(b6)
Symbol
WDTS
Symbol
WDC
5
(1)
Reserved bit
Reserved bit
Prescaler select bit
High-order bit of watchdog timer
Bit Name
Address
000F
Address
000E
16
16
Function
Set to “0”
Set to “0”
0: Divided by 16
1: Divided by 128
After Reset
Indeterminate
After Reset
00XXXXXX
Function
2
16
RW
RW
RW
RO
RW
10. Watchdog Timer
WO
RW

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