M30280F6HP#D7 Renesas Electronics America, M30280F6HP#D7 Datasheet - Page 334

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M30280F6HP#D7

Manufacturer Part Number
M30280F6HP#D7
Description
MCU 3/5V 48K I-TEMP 80-LQFP
Manufacturer
Renesas Electronics America
Series
M16C™ M16C/Tiny/28r
Datasheet

Specifications of M30280F6HP#D7

Core Processor
M16C/60
Core Size
16-Bit
Speed
20MHz
Connectivity
I²C, IEBus, SIO, UART/USART
Peripherals
DMA, POR, PWM, Voltage Detect, WDT
Number Of I /o
71
Program Memory Size
48KB (48K x 8)
Program Memory Type
FLASH
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 24x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
80-LQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-

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M
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18.6 Precautions in CPU Rewrite Mode
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Described below are the precautions to be observed when rewriting the flash memory in CPU rewrite mode.
18.6.1 Operation Speed
18.6.2 Prohibited Instructions
18.6.3 Interrupts
18.6.4 How to Access
18.6.5 Writing in the User ROM Area
0
C
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When the CPU clock source is the main clock, set the CPU clock frequency at 10 MHz or less with the
CM06 bit in the CM0 register and the CM17 and CM16 bits in the CM1 register, before entering CPU
rewrite mode (EW mode 0 or EW mode 1). Also, when selecting f
clock source, set the ROCR3 and ROCR2 bits in the ROCR register to the CPU clock division rate at
“divide-by-4” or “divide-by-8”, before entering CPU rewrite mode (EW mode 0 or EW mode 1).
In both cases, set the PM17 bit in the PM1 register to “1” (with wait state).
The following instructions cannot be used in EW mode 0 because the CPU tries to read data in the flash
memory: UND instruction, INTO instruction, JMPS instruction, JSRS instruction, and BRK instruction
To set the FMR01, FMR02, FMR11 or FMR16 bit to “1”, write “1” immediately after setting to “0”. Do not
generate an interrupt or a DMA transfer between the instruction to set the bit to “0” and the instruction to
set it to “1”. When the NMI function is selected, set the bit while an “H” signal is applied to the P8
pin.
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B
18.6.5.1 EW Mode 0
18.6.5.2 EW Mode 1
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EW Mode 0
EW Mode 1
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• To use interrupts having vectors in a relocatable vector table, the vectors must be relocated to the
• The NMI and watchdog timer interrupts are available since the FMR0 and FMR1 registers are
• The address match interrupt can not be used since the CPU tries to read data in the flash memory.
• Do not acknowledge any interrupts with vectors in the relocatable vector table or the address
• If the supply voltage drops while rewriting the block where the rewrite control program is stored,
• Do not rewrite the block where the rewrite control program is stored.
a
o r
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RAM area.
forcibly reset when either interrupt occurs. However, the interrupt program, which allocates the
jump addresses for each interrupt routine to the fixed vector table, is needed. Flash memory
rewrite operation is aborted when the NMI or watchdog timer interrupt occurs. Set the FMR01 bit
to “1” and execute the rewrite and erase program again after exiting the interrupt routine.
match interrupt during the auto program period or auto erase period with erase-suspend function
disabled.
the flash memory can not be rewritten, because the rewrite control program is not correctly rewrit-
ten. If this error occurs, rewrite the user ROM area in standard serial I/O mode or parallel I/O
mode.
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(ROC) of a on-chip oscillator as a CPU
18. Flash Memory Version
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/NMI/SD
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