SAF-XC164CM-8F40F AA Infineon Technologies, SAF-XC164CM-8F40F AA Datasheet - Page 11
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SAF-XC164CM-8F40F AA
Manufacturer Part Number
SAF-XC164CM-8F40F AA
Description
IC MCU 16BIT FLASH TQFP-64-8
Manufacturer
Infineon Technologies
Series
XC16xr
Datasheet
1.SAF-XC164CM-4F20F_AA.pdf
(70 pages)
Specifications of SAF-XC164CM-8F40F AA
Core Processor
C166SV2
Core Size
16-Bit
Speed
40MHz
Connectivity
CAN, SPI, UART/USART
Peripherals
PWM, WDT
Number Of I /o
47
Program Memory Size
64KB (64K x 8)
Program Memory Type
FLASH
Ram Size
6K x 8
Voltage - Supply (vcc/vdd)
2.35 V ~ 2.7 V
Data Converters
A/D 14x8/10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
64-LFQFP
Data Bus Width
16 bit
Data Ram Size
6 KB
Interface Type
2xASC, 2xSSC
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
47
Number Of Timers
9
Operating Supply Voltage
5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 14 Channel
Packages
PG-LQFP-64
Max Clock Frequency
40.0 MHz
Sram (incl. Cache)
6.0 KByte
Can Nodes
2
A / D Input Lines (incl. Fadc)
14
Program Memory
64.0 KByte
For Use With
B158-H8961-X-X-7600IN - KIT EASY XC164CMXC164CMUCANIN - KIT U-CAN STARTER XC164CMMCBX167-NET - BOARD EVAL INFINEON CAN/ETHRNTMCBXC167-BASIC - BOARD EVAL BASIC INFINEON XC16X
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Details
Other names
SAF-XC164CM-8F40FAACT
SAF-XC164CM-8F40FAACT
SAF-XC164CM-8F40FAAINCT
SAF-XC164CM-8F40FAACT
SAF-XC164CM-8F40FAAINCT
Table 2
Sym-
bol
RSTIN
NMI
Port 9
P9.0
P9.1
P9.2
P9.3
P9.4
P9.5
Data Sheet
Pin
Num.
63
64
43-48
43
44
45
46
47
48
Pin Definitions and Functions
Input
Outp.
I
I
IO
I/O
I
I
I/O
O
I/O
I
I
I/O
O
I/O
I/O
Function
Reset Input with Schmitt-Trigger characteristics. A low-level
at this pin while the oscillator is running resets the XC164CM.
A spike filter suppresses input pulses < 10 ns. Input pulses
> 100 ns safely pass the filter. The minimum duration for a
safe recognition should be 100 ns + 2 CPU clock cycles.
Note: The reset duration must be sufficient to let the
Non-Maskable Interrupt Input. A high to low transition at this
pin causes the CPU to vector to the NMI trap routine. When
the PWRDN (power down) instruction is executed, the NMI
pin must be low in order to force the XC164CM into power
down mode. If NMI is high, when PWRDN is executed, the
part will continue to run in normal mode.
If not used, pin NMI should be pulled high externally.
Port 9 is a 6-bit bidirectional I/O port. Each pin can be
programmed for input (output driver in high-impedance state)
or output (configurable as push/pull or open drain driver). The
input threshold of Port 9 is selectable (standard or special).
The following Port 9 pins also serve for alternate functions:
CC16IO: (CAPCOM2) CC16 Capture Inp./Compare Outp.,
CAN2_RxD: (CAN Node 2) Receive Data Input
EX5IN: (Fast External Interrupt 5) Input (alternate pin A)
CC17IO: (CAPCOM2) CC17 Capture Inp./Compare Outp.,
CAN2_TxD: (CAN Node 2) Transmit Data Output,
CC18IO: (CAPCOM2) CC18 Capture Inp./Compare Outp.,
CAN1_RxD: (CAN Node 1) Receive Data Input
EX4IN: (Fast External Interrupt 4) Input (alternate pin A)
CC19IO: (CAPCOM2) CC19 Capture Inp./Compare Outp.,
CAN1_TxD: (CAN Node 1) Transmit Data Output,
CC20IO: (CAPCOM2) CC20 Capture Inp./Compare Outp.
CC21IO: (CAPCOM2) CC21 Capture Inp./Compare Outp.
Note: At the end of an external reset P9.4 and P9.5 also may
have reached the operating range.
hardware configuration signals settle.
External circuitry must guarantee low-level at the
RSTIN pin at least until both power supply voltages
input startup configuration values.
9
General Device Information
1)
1)
Derivatives
,
,
V1.4, 2007-03
XC164CM