SAF-C167CS-L33M CA+ Infineon Technologies, SAF-C167CS-L33M CA+ Datasheet - Page 78
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SAF-C167CS-L33M CA+
Manufacturer Part Number
SAF-C167CS-L33M CA+
Description
IC MCU 16BIT ROM/LESS MQFP-144
Manufacturer
Infineon Technologies
Series
C16xxr
Datasheet
1.SAK-C167CS-LM_CA.pdf
(81 pages)
Specifications of SAF-C167CS-L33M CA+
Core Processor
C166
Core Size
16-Bit
Speed
33MHz
Connectivity
CAN, EBI/EMI, SPI, SSC, UART/USART
Peripherals
POR, PWM, WDT
Number Of I /o
111
Program Memory Type
ROMless
Ram Size
11K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 24x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
144- BSQFP
Data Bus Width
16 bit
Data Ram Size
11 KB
Interface Type
ASC, CAN, SSC
Maximum Clock Frequency
33 MHz
Number Of Programmable I/os
111
Number Of Timers
5
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 24 Channel
Packages
PG-MQFP-144
Max Clock Frequency
33.0 MHz
Sram (incl. Cache)
11.0 KByte
Can Nodes
2
A / D Input Lines (incl. Fadc)
24
Program Memory
0.0 KByte
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Program Memory Size
-
Lead Free Status / Rohs Status
Details
Other names
SAFC167CSL33MCAT
SP000016731
SP000016732
SP000016731
SP000016732
Figure 23
Notes
4)
5)
Data Sheet
This is the last chance for BREQ to trigger the indicated regain-sequence.
Even if BREQ is activated earlier, the regain-sequence is initiated by HOLD going high.
Please note that HOLD may also be deactivated without the C167CS requesting the bus.
The next C167CS driven bus cycle may start here.
CLKOUT
HOLD
HLDA
BREQ
CS
Other
Signals
External Bus Arbitration, (Regaining the Bus)
tc
29
tc
28
tc
74
29
4)
tc
30
tc
tc
5)
29
34
tc
32
C167CS-4R
V2.2, 2001-08
C167CS-L
MCT04422