MCF5253CVM140 Freescale Semiconductor, MCF5253CVM140 Datasheet - Page 314

IC MPU 32BIT 140MHZ 225-MAPBGA

MCF5253CVM140

Manufacturer Part Number
MCF5253CVM140
Description
IC MPU 32BIT 140MHZ 225-MAPBGA
Manufacturer
Freescale Semiconductor
Series
MCF525xr

Specifications of MCF5253CVM140

Core Processor
Coldfire V2
Core Size
32-Bit
Speed
140MHz
Connectivity
CAN, EBI/EMI, I²C, QSPI, UART/USART, USB OTG
Peripherals
DMA, WDT
Program Memory Type
ROMless
Ram Size
128K x 8
Voltage - Supply (vcc/vdd)
1.08 V ~ 1.32 V
Data Converters
A/D 6x12b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
225-MAPBGA
Family Name
MCF5xxx
Device Core
ColdFire V2
Device Core Size
32b
Frequency (max)
140MHz
Instruction Set Architecture
RISC
Supply Voltage 1 (typ)
1.2/3.3V
Operating Supply Voltage (max)
1.32/3.6V
Operating Supply Voltage (min)
1.08/3V
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
225
Package Type
MA-BGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Number Of I /o
-
Eeprom Size
-
Program Memory Size
-
Lead Free Status / Rohs Status
Compliant

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Audio Interface Module (AIM)
17.6.1
The IEC958 (SPDIF) receive interface consists of 2 blocks:
The source is selected by programming the appropriate EBU Control Register bits 7:6. The receiver then
extracts the data from the stream and outputs the data on the internal audio bus. The data can then be used
by the processor (using the PDIR and other registers) or by the IIS or EBU transmit interface. In the case
of the data being used as input to one of the IIS transmitters, the data rate of the incoming EBU data must
match exactly with that of the IIS transmitter. The following functions are performed by the block.
17.6.1.1
The IEC958 receive block (19) extracts the audio data from the stream and puts this in 20-bit format on
the Internal Audio Data bus. The format is exactly the same as the format produced by the serial data
interfaces.
17.6.1.2
There are two 32-bit registers, one for each receiver, which receive the first 32 bits of the “C” channel. No
interpretation is done. For a description of the control (or “C”) channel in EBU data formatting, refer to
the IEC958-3 specification’s description of control channel.
EBURcvCChannel.
17-16
Field
7–6
1. The source selector
2. The IEC958 receiver itself
IEC958 Receive source select.
00 EBU in 1
01 EBU in 2
10 EBU in 3
11 EBU in 4
IEC958 Receive Interface
Audio Data Reception
Control Channel Reception Register Descriptions
Table 17-7. EBU2Config Register Field Descriptions
MCF5253 Reference Manual, Rev. 1
Description
Figure 17-9
illustrates the valid bits in the
Freescale Semiconductor
Reset
00

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