MCF5253CVM140 Freescale Semiconductor, MCF5253CVM140 Datasheet - Page 337

• Manufacturer Part Number: MCF5253CVM140
• Description: IC MPU 32BIT 140MHZ 225-MAPBGA
• Manufacturer: Freescale Semiconductor
• Series: MCF525xr

Specifications of MCF5253CVM140

• Core Processor: Coldfire V2
• Core Size: 32-Bit
• Speed: 140MHz
• Connectivity: CAN, EBI/EMI, I²C, QSPI, UART/USART, USB OTG
• Peripherals: DMA, WDT
• Program Memory Type: ROMless
• Ram Size: 128K x 8
• Voltage - Supply (vcc/vdd): 1.08 V ~ 1.32 V
• Data Converters: A/D 6x12b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 225-MAPBGA
• Family Name: MCF5xxx
• Device Core: ColdFire V2
• Device Core Size: 32b
• Frequency (max): 140MHz
• Instruction Set Architecture: RISC
• Supply Voltage 1 (typ): 1.2/3.3V
• Operating Supply Voltage (max): 1.32/3.6V
• Operating Supply Voltage (min): 1.08/3V
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 225
• Package Type: MA-BGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Number Of I /o: -
• Eeprom Size: -
• Program Memory Size: -
• Lead Free Status / Rohs Status: Compliant

Freescale Semiconductor
Notes:
Bit Number
6, 7
1, 2
5
3
1. See
2. Decode Sync Allow and Encode Sync Allow define whether the interfaces recognize the CD-ROM syncs embedded in the
3. CDROM descrambling/scrambling control if required.
4. Mode selection determines how the CRC is calculated. The CRC depends on the CD-ROM mode/form, as defined in CD
5. inserted CRC will over-write processor written data. (Processor sets CRC to any value, logic overwrites this.)
CD-ROM sectors. If this bit is switched on, then the interface will recognize the start of a new sector after finding the sync
sequence in the data. If the bit is switched off, or if no sync sequence is found, sector start is assumed to be one sector length
(2352 bytes) after the previous sector.
standards.
1
Table 17-22
Notation used is 32-bit words. Bits31-16 are part of the LEFT sample, bits 15-0 are part of the RIGHT sample.
ENCODE SWAP
ENCODE SYNC
Swap Field
Bit Name
ENCODE
ENCODE
ENABLE
ENABLE
Table 17-21. BlockControl Register Field Descriptions (continued)
MODE
00
01
10
11
for definition of how the swap is done.
Table 17-22. Swap Control in CD-ROM Encoder/Decoder
See note 1.
Block encode swap control
See note 2.
1 Outgoing sync detecting enabled
0 Outgoing sync detecting disabled
See note 3.
1 Scramble active
0 Scrambling inactive
00 No CRC instructed
01 Mode 1
10 Mode 2, form 1
11 Mode 2, form 2
dataOut(31:0):= dataIn(31:0)
dataOut(31:16):= dataIn(15:0)
dataOut(15:0):= dataIn(31:16)
dataOut(31:24):= dataIn(23:16)
dataOut(23:16):= dataIn(31:24)
dataOut(15:8):= dataIn(7:0)
dataOut(7:0):= dataIn(15:8)
dataOut(31:24):= dataIn(7:0)
dataOut(23:16):= dataIn(15:8)
dataOut(15:8):= dataIn(23:16)
dataOut(7:0):= dataIn(31:24)
MCF5253 Reference Manual, Rev. 1
Description
Swap Action
1
Reset
00
00
Audio Interface Module (AIM)
0
0
Notes
4, 5
1
2
3
17-39