MCF5272VF66 Freescale Semiconductor, MCF5272VF66 Datasheet - Page 536

IC MPU 32BIT 66MHZ 196-MAPBGA

MCF5272VF66

Manufacturer Part Number
MCF5272VF66
Description
IC MPU 32BIT 66MHZ 196-MAPBGA
Manufacturer
Freescale Semiconductor
Series
MCF527xr
Datasheets

Specifications of MCF5272VF66

Core Processor
Coldfire V2
Core Size
32-Bit
Speed
66MHz
Connectivity
EBI/EMI, Ethernet, I²C, SPI, UART/USART, USB
Peripherals
DMA, WDT
Number Of I /o
32
Program Memory Size
16KB (4K x 32)
Program Memory Type
ROM
Ram Size
1K x 32
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Oscillator Type
External
Operating Temperature
0°C ~ 70°C
Package / Case
196-MAPBGA
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Data Converters
-

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Index
Index-6
interrupt controller, pending and mask, 7-4,
JTAG instruction,
local memory,
MASK,
maximum frame length,
MBAR, 2-9,
MII management frame,
MII speed control,
module base address,
output port command,
P0B1RR–P3B1RR,
P0B2RR–P3B2RR,
P0CR–P3CR,
P0GCIR–P3GCIR,
P0GMT–P3GMT,
P0ICR–P3ICR,
P0PSR–P3PSR,
P0SDR–P3SDR,
P3B1TR–P0B1TR,
P3B2TR–P0B2TR,
P3DRR–P0DRR,
P3DTR–P0DTR,
P3GCIT–P0GCIT,
P3GMR–P0GMR,
PADDR,
PAR,
PASR,
PBDDR,
PBR,
PCDDR,
PCSR,
PDCSR,
PDRQR,
PGCITSR,
PGMTA,
PGMTS,
PLCR,
PLIC
aperiodic status,
B1 data transmit,
B2 data receive,
clock select,
D data transmit,
D-Channel status,
GCI C/I channel
GCI monitor channel
general,
interrupt configuration,
loopback control,
memory map,
receive,
transmit,
general,
transmit,
transmit status,
5-13
7-9
13-23
13-34
13-20
2-6
13-31
17-10
17-11
13-32
13-27
17-10
13-26
13-15
13-30
6-3
13-28
13-24
13-29
13-25
13-18
4-2
13-34
13-20
13-22
13-13
13-33
13-18
13-16
21-7
13-25
13-18
13-16
11-18
13-24
13-23
13-29
13-28
13-17
13-17
13-17
13-15
13-16
13-20
13-27
13-31
2-9
16-18
MCF5272 ColdFire
11-24
11-17
13-20
®
7-5
Integrated Microprocessor User’s Manual, Rev. 3
PMR,
pointer-to-receive descriptor ring,
pointer-to-transmit descriptor ring,
power management,
PWM control,
PWM width,
QSPI
RAM base address,
RAM perfect match address
RAMBAR,
RAREG/RDREG,
RCREG,
RDMREG,
read control,
read debug module,
receive buffer size,
receive control,
ROM base address,
SCR,
SDCR,
SDRAM
SDTR,
SIM
SPR,
SR,
SRAM base address,
status, 2-8,
system configuration,
system protection,
TCR,
TDR,
TER,
timer
periodic status,
port configuration,
receive data,
sync delay,
transmit data,
address,
data,
delay,
interrupt,
mode,
wrap,
high,
low,
configuration,
general,
timing,
base address, 7-6,
memory map,
module base address,
capture,
event,
general-purpose,
2-8
6-6
6-5
15-5
15-4
5-14
6-7
11-26
14-14
9-8
9-6
11-27
14-12
14-11
15-5
14-9
5-30
9-8
9-6
15-4
14-14
2-8
5-32
14-13
2-9
5-30
18-4
13-33
18-3
13-3
11-23
13-4
6-2
9-6
13-22
5-22
6-6
15-3
11-32
2-9
4-5
5-32
7-8
6-7
4-3
13-18
6-5
6-3
Freescale Semiconductor
11-30
11-31

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