AD8362ARUZ Analog Devices Inc, AD8362ARUZ Datasheet - Page 19

• Manufacturer Part Number: AD8362ARUZ
• Description: IC PWR DETECTOR 3.8GHZ 16-TSSOP
• Manufacturer: Analog Devices Inc

Specifications of AD8362ARUZ

• Rf Type: Cellular, GSM, CDMA, TDMA, TETRA
• Frequency: 50Hz ~ 3.8GHz
• Input Range: -52dBm ~ 8dBm
• Accuracy: 0.5dB
• Voltage - Supply: 4.5 V ~ 5.5 V
• Current - Supply: 20mA
• Package / Case: 16-TSSOP (0.173", 4.40mm Width)
• Frequency Range: 50Hz To 3.8GHz
• Supply Current: 20mA
• Supply Voltage Range: 4.5V To 5.5V
• Rf Ic Case Style: TSSOP
• No. Of Pins: 16
• Operating Temperature Range: -40°C To +85°C
• Pin Count: 16
• Screening Level: Industrial
• Package Type: TSSOP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

OPERATION IN RF MEASUREMENT MODE
BASIC CONNECTIONS
Basic connections for operating the AD8362 in measurement
mode are shown in Figure 47. While the AD8362 requires a
single supply of nominally 5 V, its performance is essentially
unaffected by variations of up to ±10%.
The supply is connected to the VPOS pin using the decoupling
network also displayed in Figure 47. The capacitors used in this
network must provide a low impedance over the full frequency
range of the input and should be placed as close as possible to
the VPOS pin. Two different capacitors are used in parallel to
reduce the overall impedance because these have different reso-
nant frequencies. The measurement accuracy is not critically
dependent on supply decoupling because the high frequency
signal path is confined to the relevant input pins. Lead lengths
from both DECL pins to ground and from INHI/INLO to the
input coupling capacitors should be as short as possible. All
COMM pins should also connect directly to the ground plane.
To place the device in measurement mode, connect VOUT to
VSET and connect VTGT directly to VREF.
DEVICE DISABLE
The AD8362 is disabled by a logic high on the PWDN pin,
which can be directly grounded for continuous operation.
When enabled, the supply current is nominally 20 mA and
essentially independent of supply voltage and input signal
strength. When powered down by a logic low on PWDN,
the supply current is reduced to 230 μA.
RECOMMENDED INPUT COUPLING
The full dynamic range of the AD8362, particularly at very
high frequencies (above 500 MHz), is realized only when the
input is presented to it in differential (balanced) form. In Figure 47,
a transmission line balun is used at the input. Having a 1:4
impedance ratio (1:2 turns ratio), the 200 Ω differential input
resistance of the AD8362 becomes 50 Ω at the input to the balun.
SIGNAL
Z = 50Ω
INPUT
1000pF
C10
Figure 47. Basic Connections for RF Power Measurement
1:4 Z-RATIO
ETC1.6-4-2-3
T1
100pF
100pF
C6
C5
1000pF
1nF
C4
C8
1nF
C7
1
2
3
4
5
6
7
8
COMM
CHPF
DECL
INHI
INLO
DECL
PWDN
COMM
AD8362
ACOM
ACOM
VPOS
VOUT
VREF
VTGT
VSET
CLPF
16
15
14
13
12
11
10
9
0.1µF
C3
5V @ 24mA
V
S
0.1µF
1nF
C1
C2
V
OUT
Rev. D | Page 19 of 32
The balun outputs must be ac-coupled to the input of the
AD8362. The balun used in this example (M/A-COM ETC
1.6-4-2-3) is specified for operation from 0.5 GHz to 2.5 GHz.
If a center-tapped, flux-coupled transformer is used, connect
the center tap to the DECL pins, which are biased to the same
potential as the inputs (~3.6 V).
At lower frequencies where impedance matching is not neces-
sary, the AD8362 can be driven from a low impedance differential
source, remembering the inputs must be ac-coupled.
Choosing Input Coupling Capacitors
As noted, the inputs must be ac-coupled. The input coupling
capacitors combine with the 200 Ω input impedance to create
an input high pass corner frequency equal to
Typically, f
frequency of interest.
Single-Ended Input Drive
As previously noted, the input stages of the AD8362 are optimally
driven from a fully balanced source, which should be provided
wherever possible. In many cases, unbalanced sources can be
applied directly to one or the other of the two input pins. The
chief disadvantage of this driving method is a 10 dB to 15 dB
reduction in dynamic range at frequencies above 500 MHz.
Figure 48 illustrates one of many ways of coupling the signal
source to the AD8362. Because the input pins are biased to
about 3.6 V (for V
when driving from a grounded source. For signal frequencies
>5 MHz, a value of 1 nF is adequate. While either INHI or
INLO can be used, INHI is chosen here.
Figure 48. Input Coupling from a Single-Ended 50 Ω Source
f
HP
= 1/(200 × π × C
RF INPUT
HP
should be set to at least one tenth the lowest input
100Ω
S
= 5 V), dc-blocking capacitors are required
C
)
0.01µF
1nF
1nF
1nF
1nF
1
2
3
4
5
6
7
8
COMM
CHPF
DECL
INHI
INLO
DECL
PWDN
COMM
AD8362
ACOM
ACOM
VPOS
VOUT
VREF
VTGT
VSET
CLPF
16
15
14
13
12
11
10
9
AD8362
(12)