AD8362ARUZ Analog Devices Inc, AD8362ARUZ Datasheet - Page 27

• Manufacturer Part Number: AD8362ARUZ
• Description: IC PWR DETECTOR 3.8GHZ 16-TSSOP
• Manufacturer: Analog Devices Inc

Specifications of AD8362ARUZ

• Rf Type: Cellular, GSM, CDMA, TDMA, TETRA
• Frequency: 50Hz ~ 3.8GHz
• Input Range: -52dBm ~ 8dBm
• Accuracy: 0.5dB
• Voltage - Supply: 4.5 V ~ 5.5 V
• Current - Supply: 20mA
• Package / Case: 16-TSSOP (0.173", 4.40mm Width)
• Frequency Range: 50Hz To 3.8GHz
• Supply Current: 20mA
• Supply Voltage Range: 4.5V To 5.5V
• Rf Ic Case Style: TSSOP
• No. Of Pins: 16
• Operating Temperature Range: -40°C To +85°C
• Pin Count: 16
• Screening Level: Industrial
• Package Type: TSSOP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

RMS VOLTMETER WITH 90 dB DYNAMIC RANGE
The 65 dB range of the AD8362 can be extended by adding a
standalone VGA as a preamplifier whose gain control input is
derived directly from VOUT. This extends the dynamic range
by the gain control range of this second amplifier. When this
VGA also provides a linear-in-dB (exponential) gain control
function, the overall measurement remains linearly scaled in
decibels. The VGA gain must decrease with an increase in its
gain bias in the same way as the AD8362. Alternatively, an
inverting op amp with suitable level shifting can be used. It is
convenient to select a VGA needing only a single 5 V supply
and capable of generating a fully balanced differential output.
All of these conditions are met by the AD8330. Figure 66 shows
the schematic. Also, note that the
single-ended input into the differential-ended input needed by
the AD8330. The AD8131’s gain of 2 does create a dc offset on
the output of the AD8362, but this is removed by connecting
0.5 V to the VMAG on AD8330.
Using the inverse gain mode (MODE pin low) of the AD8330,
its gain decreases on a slope of 30 mV/dB to a minimum value
of 3 dB for a gain voltage (VDBS) of 1.5 V. VDBS is 40% of the
output of the AD8362. Over the 3 V range from 0.5 V to 3.5 V,
the gain of the AD8330 varies by (0.4 × 3 V)/(30 mV/dB), or
40 dB. Combined with the 65 dB gain span of the AD8362, this
results in a 100 dB variation for a 3 V change in VOUT. Due to
the noise generated from the AD8330, the dynamic range is
INPUT
49.9Ω
GAIN OF 2
–5V
0.1µF
AD8131
0.1µF
29.9Ω
8
2
1
3
6
AD8131
4
5
0.01µF
0.01µF
0.1µF
0.1µF
is used to convert a
Figure 66. RMS Voltmeter with 90 dB Dynamic Range
VPS1
INHI
INLO
MODE
VDBS
ENBL
0.1µF
CMGN
OFST
AD8330
Rev. D | Page 27 of 32
0.1µF
COMM
VPOS
VMAG
CNTR
+0.5V
0.1µF
CMOP
VPSO
OPLO
OPHI
limited to approximately 90 dB. This can only be achieved when
a band-pass filter is used at the operating frequency between
the AD8330 and AD8362.
Figure 65 shows data results of the extended dynamic range at
70 MHz with error in VOUT.
BAND-PASS
@ 70MHz
3.0
2.5
2.0
1.5
1.0
0.5
–103
0
–90
0.1µF
Figure 65. Output and Conformance for the AD8330/AD8362
+5V
10µF
–93
–80
–83
–70
1
2
3
4
5
6
7
8
Extended Dynamic Range Circuit
COMM
CHPF
DECL
INHI
INLO
DECL
PWDN
COMM
–73
–60
AD8362
–63
–50
INPUT (dBm)
INPUT (dBV)
ACOM
ACOM
VPOS
VOUT
–53
–40
VREF
VTGT
VSET
CLPF
–43
–30
16
15
14
13
12
11
10
9
–33
–20
10µF
–23
–10
–13
0
0.1µF
2kΩ
2kΩ
V
–3
10
OUT
AD8362
20
7
6
4
2
0
–2
–4
–
6