ADF7021-NBCPZ Analog Devices Inc, ADF7021-NBCPZ Datasheet - Page 60
![IC TXRX 80-650/842-916MHZ 48LFCS](/photos/6/50/65022/cp-48-8_sml.jpg)
ADF7021-NBCPZ
Manufacturer Part Number
ADF7021-NBCPZ
Description
IC TXRX 80-650/842-916MHZ 48LFCS
Manufacturer
Analog Devices Inc
Datasheet
1.ADF7021-NBCPZ-RL.pdf
(64 pages)
Specifications of ADF7021-NBCPZ
Frequency
80MHz ~ 650MHz, 842MHz ~ 916MHz
Data Rate - Maximum
33kbps
Modulation Or Protocol
2-FSK, 3-FSK, 4-FSK, MSK
Applications
Keyless Entery, Pagers, WMTS
Power - Output
-16dBm ~ 13dBm
Sensitivity
-130dBm
Voltage - Supply
2.3 V ~ 6 V
Current - Receiving
26mA
Current - Transmitting
32.3mA @ 10dBm
Data Interface
PCB, Surface Mount
Antenna Connector
PCB, Surface Mount
Operating Temperature
-40°C ~ 85°C
Package / Case
48-LFCSP
Receiving Current
26.4mA
Transmitting Current
20.2mA
Data Rate
24Kbps
Frequency Range
80MHz To 916MHz
Modulation Type
FSK, MSK
Rf Ic Case Style
LFCSP
No. Of Pins
48
Operating Temperature (min)
-40C
Operating Temperature (max)
85C
Operating Temperature Classification
Industrial
Product Depth (mm)
7mm
Product Length (mm)
7mm
Operating Supply Voltage (min)
2.3V
Operating Supply Voltage (typ)
2.5/3.3V
Operating Supply Voltage (max)
3.6V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
EVAL-ADF7021DBZ6 - BOARD EVAL ADF7021 608-614MHZEVAL-ADF7021DBZ5 - BOARD EVAL ADF7021EVAL-ADF7021DBZ3 - BOARD DAUGHTER FOR ADF7021EVAL-ADF7021DBZ2 - BOARD EVAL FOR ISM ADF7021
Memory Size
-
Lead Free Status / Rohs Status
Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ADF7021-NBCPZ
Manufacturer:
ADI/亚德诺
Quantity:
20 000
Company:
Part Number:
ADF7021-NBCPZ-RL7
Manufacturer:
ST
Quantity:
210
ADF7021-N
REGISTER 11—SYNC WORD DETECT REGISTER
REGISTER 12—SWD/THRESHOLD SETUP REGISTER
Lock threshold locks the threshold of the envelope detector. This has the effect of locking the slicer in linear demodulation and locking
the AFC and AGC loops when using linear or correlator demodulation.
0
1
2
3
SWD_MODE
SWD PIN LOW
SWD PIN HIGH AFTER NEXT SYNCWORD
SWD PIN HIGH AFTER NEXT SYNCWORD
FOR DATA PACKET LENGTH NUMBER OF BYTES
INTERRUPT PIN HIGH
SYNC_BYTE_SEQUENCE
0
1
2
3
Figure 75. Register 12—SWD/Threshold Setup Register Map
0
1
...
255
Figure 74. Register 11—Sync Word Detect Register Map
LOCK_THRESHOLD_MODE
THRESHOLD FREE RUNNING
LOCK THRESHOLD AFTER NEXT SYNCWORD
LOCK THRESHOLD AFTER NEXT SYNCWORD
FOR DATA PACKET LENGTH NUMBER OF BYTES
LOCK THRESHOLD
DATA_PACKET_LENGTH
255 BYTES
INVALID
1 BYTE
DATA_PACKET_LENGTH
...
Rev. 0 | Page 60 of 64
CONTROL
BITS
MT2
0
0
1
1
MT1
0
1
0
1
ACCEPT 0 ERRORS
MATCHING_
TOLERANCE
ACCEPT 1 ERROR
ACCEPT 2 ERRORS
ACCEPT 3 ERRORS
PL2
0
0
1
1
PL1
0
1
0
1
SYNC_BYTE_
LENGTH
12 BITS
16 BITS
20 BITS
24 BITS
CONTROL
BITS