AT86RF401U-XI Atmel, AT86RF401U-XI Datasheet - Page 29

• Manufacturer Part Number: AT86RF401U-XI
• Description: IC MICRO TX RF W/AVR 20-TSSOP
• Manufacturer: Atmel

Specifications of AT86RF401U-XI

• Frequency: 264MHz ~ 456MHz
• Applications: Garage Opener, RKE, Telemetry
• Modulation Or Protocol: ASK, OOK
• Data Rate - Maximum: 10 kbps
• Power - Output: 6dBm
• Current - Transmitting: 23.2mA
• Data Interface: PCB, Surface Mount
• Antenna Connector: PCB, Surface Mount
• Memory Size: 2KB Flash, 128 Byte EEPROM, 128Byte SRAM
• Voltage - Supply: 2 V ~ 5 V
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 20-TSSOP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Features: -
• Other names: AT86RF401U

I/O and Control
Registers
Transmitter Control Register Descriptions
Lock Detector Configuration Register 1 – LOCKDET1
1424F–RKE–12/03
Initial Value
Read/Write
$10
Bit
R/W
7
–
0
The AT86RF401 I/Os and peripherals are placed in the I/O space. The various I/O loca-
tions are accessed by the IN and OUT instructions transferring data between the 32
general-purpose working registers and the I/O space. I/O registers within the address
range $00–$1F are directly bit-accessible using the SBI and CBI instructions. In these
registers, the value of single bits can be checked by using the SBIS and SBIC instruc-
tions. Refer to Table 22 on page 45 for more details. The different I/O and peripherals
control registers are explained in the following sections.
• Bits[7:5]
Reserved.
• Bit[4]: UPOK
If set high, this bit resets the unlock counter. The bit is level sensitive, and the unlock
counter will not count unless this bit is set to “0”. Leaving this bit high essentially dis-
ables the unlock detector.
• Bit[3]: ENKO (Enable Key on Bit)
If set to “1”, the rising edge of TXK starts the blackout period, during which any cycle
slips are ignored and do not affect the unlock circuit.
• Bit[2]: BOD (Black Out Disable)
When set high, cycle slips are counted immediately but only if LOCK is asserted high
(TX_CNTL b[2]).
• Bits[1:0] CS[1:0]: Cycle Slip Counter
These two bits determine how many cycle slips are allowed before the LOCKDETECT
signal is set low. The cycle slips are not counted unless the blackout logic is either dis-
abled or the blackout window has passed.
Table 9. Cycle Slip Counter Definition
CS[1:0]
00
01
10
11
R/W
6
–
0
R/W
5
–
0
Functionality
1 cycle slip causes unlock condition
2 cycle slips cause unlock condition
3 cycle slips cause unlock condition
4 cycle slips cause unlock condition
UPOK
R/W
4
0
ENKO
R/W
3
0
BOD
R/W
2
0
AT86RF401
CS1
R/W
1
0
CS0
R/W
0
0
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