AT86RF401U-XI Atmel, AT86RF401U-XI Datasheet - Page 9

• Manufacturer Part Number: AT86RF401U-XI
• Description: IC MICRO TX RF W/AVR 20-TSSOP
• Manufacturer: Atmel

Specifications of AT86RF401U-XI

• Frequency: 264MHz ~ 456MHz
• Applications: Garage Opener, RKE, Telemetry
• Modulation Or Protocol: ASK, OOK
• Data Rate - Maximum: 10 kbps
• Power - Output: 6dBm
• Current - Transmitting: 23.2mA
• Data Interface: PCB, Surface Mount
• Antenna Connector: PCB, Surface Mount
• Memory Size: 2KB Flash, 128 Byte EEPROM, 128Byte SRAM
• Voltage - Supply: 2 V ~ 5 V
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 20-TSSOP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Features: -
• Other names: AT86RF401U

Table 4. Analog/RF Specs
V
Note:
Functional
Description
Transmitter
Crystal Oscillator
Radio Frequency Power
Amplifier
Frequency Synthesizer
Lock Detector
1424F–RKE–12/03
Symbol
I
P
P
Crystal Oscillator
f
Frequency Synthesizer/PLL
F
P
f
DD
RF Amplifier
PA
OSC
MOD
OUT
CTLRANGE
CTLRES
HARM
= 3.3V; f
1
1. Characterized but not guaranteed by test due to dependency on PCB trace antenna
XTAL
Parameter
Power Amp Output Current
Power Control Range
Power Control Resolution
Oscillation Frequency Range
Output Frequency Range
Harmonics
OOK Modulation Data Rate
= 13.125 MHz; f
AVR
The complete circuit consists of the following functional blocks.
The crystal oscillator circuit is designed to work with crystals with fundamental frequen-
cies between 11 and 19 MHz. Forty pF of internal capacitance is connected between
each of the crystal input pins and (chip) ground. Alternatively, an external clock can be
used for these functions.
This circuit provides the master clock for the entire chip. A programmable divider is used
to provide the AVR system clock.
The RF power amplifier generates a differential output suitable for driving an off-chip
tuned-loop antenna from the PLL output. The PLL output signal is gated using on-off
keyed (OOK) modulation before transmission. It is used as the RF carrier frequency for
the transmitted data stream. The amplifier can be configured via software to reduce the
power output by 36 dB (with 1 dB resolution).
The frequency synthesizer utilizes a PLL, which consists of a phase detector, a 24
prescaler, an on-chip loop filter and an integrated VCO. The VCO output is buffered
prior to the output amplifier. The output frequency is 24 times the crystal frequency. To
offset component tolerance, a switched capacitor array is connected between pins 3
and 4 of the VCO. Thirty-two discrete steps of capacitance are available to tune the
VCO control voltage. An internal window comparator monitors the magnitude of the tun-
ing voltage and is used by the AVR core to determine the optimal tuning configuration.
The lock detection block provides an indication of the state of the phase lock loop (PLL).
Lock condition is determined by counting the number of cycle slips in a given time
= f
XTAL
Conditions
Transmitting (RF “ON”), 0 dB Attenuation
I/O Pins Static during RF Transmission
Using PCB Trace Antenna
Using Manchester Data Bit Encoding
16; T
A
= 25°C unless otherwise specified.
Min
264
11
–
–
–
–
–
Typ
8.6
36
1
–
–
60
–
AT86RF401
Max
456
19
10
–
–
–
–
Kbps
Unit
MHz
MHz
dBc
mA
dB
dB
9