M1AFS-EMBEDDED-KIT Actel, M1AFS-EMBEDDED-KIT Datasheet - Page 19
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M1AFS-EMBEDDED-KIT
Manufacturer Part Number
M1AFS-EMBEDDED-KIT
Description
MCU, MPU & DSP Development Tools CortexM1-enabled Fusion Embedded Kit
Manufacturer
Actel
Datasheet
1.M1AFS-EMBEDDED-KIT.pdf
(56 pages)
Specifications of M1AFS-EMBEDDED-KIT
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Special Purpose Program Status Registers (xPSR)
Processor status at the system level is broken into three categories and can be accessed as individual
registers, a combination of any two of the three, or a combination of all three using the MRS and MSR
instructions.
On entering an exception, the processor saves the combined information from the three status registers
on the stack.
Special Purpose Priority Mask Register
Use the special purpose Priority Mask Register to boost execution priority. The special purpose Priority
Mask Register can be accessed by using the MSR and MRS instructions. The CPS instruction to set or
clear PRIMASK can also be accessed.
Special Purpose Control Register
The special purpose Control Register identifies the stack pointers usage.
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•
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Application PSR (APSR)
processor saves the condition code flags on the stack. The APSR can be accessed with the MSR
and MRS instructions.
Interrupt PSR (IPSR)
exception
Execution PSR (EPSR)
Debug state, the EPSR is not directly accessible and all fields read as zero using an MRS
instruction. MSR instruction writes are ignored.
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–
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Contains the Interrupt Service Routine (ISR) number of the current
Contains the condition code flags. Before entering an exception, the
Contains the Thumb state bit (T-bit). Unless the processor is in
R ev i si o n 1 2
Cortex-M1 v3.1 Handbook
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