LCMXO640C-3MN100C Lattice, LCMXO640C-3MN100C Datasheet - Page 54

• Manufacturer Part Number: LCMXO640C-3MN100C
• Description: CPLD - Complex Programmable Logic Devices 640 LUTs 74 IO 1.8/2 .5/3.3V -3 Spd
• Manufacturer: Lattice

Specifications of LCMXO640C-3MN100C

• Memory Type: SRAM
• Number Of Macrocells: 320
• Maximum Operating Frequency: 500 MHz
• Delay Time: 4.9 ns
• Number Of Programmable I/os: 74
• Operating Supply Voltage: 1.8 V, 2.5 V, 3.3 V
• Supply Current: 17 mA
• Maximum Operating Temperature: + 85 C
• Minimum Operating Temperature: 0 C
• Package / Case: CSBGA-100
• Mounting Style: SMD/SMT
• Supply Voltage (max): 3.465 V
• Supply Voltage (min): 1.71 V
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Lattice Semiconductor
LCMXO1200 and LCMXO2280 Logic Signal Connections: 100 TQFP (Cont.)
*Supports true LVDS outputs.
**Double bonded to the pin.
***NC for "E" devices.
****Primary clock inputs are single-ended.
Number
100**
Pin
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
Function
VCCAUX
GNDIO0
GNDIO7
VCCIO0
PT7D
PT6D
PT6C
PT3D
PT3C
PT9A
PT8B
PT8A
PT6F
PT5B
PT4B
PT3B
PT2B
PT2A
GND
VCC
Ball
Bank
1
1
1
1
0
0
0
0
0
0
0
0
0
0
0
-
-
-
-
LCMXO1200
PCLK1_1****
PCLK0_0****
Function
Dual
Differential
4-10
C
C
T
C
T
C
T
T
Function
VCCAUX
GNDIO0
GNDIO7
VCCIO0
PT12C
PT11B
PT11A
PT10B
PT8E
PT6D
PT4B
PT4A
PT3B
PT2B
PT2A
PT9B
PT8F
PT6F
GND
VCC
Ball
Bank
1
1
1
1
1
0
0
0
0
0
0
0
0
0
0
-
-
-
-
MachXO Family Data Sheet
LCMXO2280
PCLK1_1****
PCLK1_0****
Function
Dual
Pinout Information
Differential
C
C
C
C
T
T
T
T
T