LCMXO640C-3MN100C Lattice, LCMXO640C-3MN100C Datasheet - Page 56
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LCMXO640C-3MN100C
Manufacturer Part Number
LCMXO640C-3MN100C
Description
CPLD - Complex Programmable Logic Devices 640 LUTs 74 IO 1.8/2 .5/3.3V -3 Spd
Manufacturer
Lattice
Datasheet
1.LCMXO640C-3TN100C.pdf
(95 pages)
Specifications of LCMXO640C-3MN100C
Memory Type
SRAM
Number Of Macrocells
320
Maximum Operating Frequency
500 MHz
Delay Time
4.9 ns
Number Of Programmable I/os
74
Operating Supply Voltage
1.8 V, 2.5 V, 3.3 V
Supply Current
17 mA
Maximum Operating Temperature
+ 85 C
Minimum Operating Temperature
0 C
Package / Case
CSBGA-100
Mounting Style
SMD/SMT
Supply Voltage (max)
3.465 V
Supply Voltage (min)
1.71 V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
LCMXO640C-3MN100C
Manufacturer:
ZARLINK
Quantity:
984
Company:
Part Number:
LCMXO640C-3MN100C
Manufacturer:
Lattice Semiconductor Corporation
Quantity:
10 000
Lattice Semiconductor
LCMXO256 and LCMXO640 Logic Signal Connections: 100 csBGA (Cont.)
Number
M12*
M14
M13
G14
G13
Ball
P13
P14
N13
N14
K14
K13
H13
E14
E13
D14
D13
C14
C13
B14
C12
B13
A13
A12
B11
A11
B12
A10
B10
L13
L14
F14
F13
J14
J13
A9
A8
B8
A7
B7
A6
B6
A5
Function
VCCAUX
SLEEPN
GNDIO0
GNDIO0
PR7D
PR7C
PR5D
PR5C
PR3D
PR3C
PB5A
PB5C
PB5D
PR9B
PR9A
PR8B
PR8A
PR7B
PR7A
PR6B
PR6A
PR5B
PR5A
PR4B
PR4A
PR3B
PR3A
PR2B
PR2A
PT5C
PT4D
PT4C
PT3D
PT3C
PT5B
PT5A
PT4F
PT4E
PT4B
PT4A
PT3B
VCC
Ball
LCMXO256
Bank
1
1
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
-
-
-
PCLK0_1**
PCLK0_0**
Function
SLEEPN
Dual
Differen-
tial
C
C
C
C
C
C
C
C
C
C
C
C
C
C
C
C
C
C
T
T
T
T
T
T
T
T
T
T
T
T
T
T
T
T
T
4-12
Number
M12*
M14
M13
G14
G13
Ball
P13
P14
N13
N14
K14
K13
H13
F14
F13
E14
E13
D14
D13
C14
C13
B14
C12
B13
A13
A12
B11
A11
B12
A10
B10
L13
L14
J14
J13
A9
A8
B8
A7
B7
A6
B6
A5
Function
VCCAUX
SLEEPN
GNDIO1
GNDIO1
GNDIO0
VCCIO0
PR11D
PR11B
PR11C
PR11A
PR10D
PR10C
PR10B
PR10A
PB9C
PB9D
PR9D
PR9B
PR7B
PR6C
PR6B
PR5D
PR5B
PR4D
PR4B
PR3D
PR3B
PR2D
PR2B
PB9F
PT9E
PT9C
PT9A
PT7E
PT7A
PT6B
PT5B
PT5A
PT9F
PT4F
PT3F
VCC
Ball
MachXO Family Data Sheet
LCMXO640
Bank
2
2
2
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
0
0
0
0
0
-
-
-
Pinout Information
PCLK0_1**
PCLK0_0**
Function
SLEEPN
Dual
Differen-
tial
C
C
C
C
C
C
C
T
T
T
T
T
T
T