A54SX08A-TQG100 Actel, A54SX08A-TQG100 Datasheet - Page 106

FPGA - Field Programmable Gate Array 12K System Gates

A54SX08A-TQG100

Manufacturer Part Number
A54SX08A-TQG100
Description
FPGA - Field Programmable Gate Array 12K System Gates
Manufacturer
Actel
Datasheet

Specifications of A54SX08A-TQG100

Processor Series
A54SX08
Core
IP Core
Number Of Macrocells
512
Maximum Operating Frequency
350 MHz
Number Of Programmable I/os
130
Delay Time
4 ns to 8.4 ns
Supply Voltage (max)
5.25 V
Maximum Operating Temperature
+ 70 C
Minimum Operating Temperature
0 C
Development Tools By Supplier
Silicon-Explorer II, Silicon-Sculptor 3, SI-EX-TCA
Mounting Style
SMD/SMT
Supply Voltage (min)
2.25 V
Number Of Gates
8000
Package / Case
TQFP-100
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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4 -2
Previous Version Changes in Current Version (v5 . 3)
SX-A Family FPGAs
(continued)
v2.0.1
v4.0
v3.0
Table 2-12
The was updated.
The
Table 2-13
Table 2-13
All timing tables were updated.
The
Design Theft" section
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"Sample Path Calculations"
"Ordering Information" section
"Temperature Grade Offering" section
Figure 1-1 • SX-A Family Interconnect Elements
“"Clock Resources"
Table 1-1 • SX-A Clock Resources
"User Security" section
"I/O Modules" section
Table 1-2 • I/O Features
Table 1-3 • I/O Characteristics for All I/O Configurations
Table 1-4 • Power-Up Time at which I/Os Become Active
Figure 1-12 • Device Selection Wizard
"Boundary-Scan Pin Configurations and Functions" section
Table 1-9 • Device Configuration Options for Probe Capability (TRST Pin Reserved)
"SX-A Probe Circuit Control Pins" section
"Design Considerations" section
Figure 1-13 • Probe Setup
Design Environment
Figure 1-13 • Design Flow
"Absolute Maximum Ratings*" section
"Recommended Operating Conditions" section
"Electrical Specifications" section
"2.5V LVCMOS2 Electrical Specifications" section
"SX-A Timing Model"
"Pin Description" section
"Design Environment" section
"I/O Modules"
"Actel Secure Programming Technology with FuseLock™ Prevents Reverse Engineering and
"SX-A Timing Model" section
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Table 1-2 • I/O Features
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"Timing Characteristics" section
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have new timing
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