A54SX08A-TQG100 Actel, A54SX08A-TQG100 Datasheet - Page 59

FPGA - Field Programmable Gate Array 12K System Gates

A54SX08A-TQG100

Manufacturer Part Number
A54SX08A-TQG100
Description
FPGA - Field Programmable Gate Array 12K System Gates
Manufacturer
Actel
Datasheet

Specifications of A54SX08A-TQG100

Processor Series
A54SX08
Core
IP Core
Number Of Macrocells
512
Maximum Operating Frequency
350 MHz
Number Of Programmable I/os
130
Delay Time
4 ns to 8.4 ns
Supply Voltage (max)
5.25 V
Maximum Operating Temperature
+ 70 C
Minimum Operating Temperature
0 C
Development Tools By Supplier
Silicon-Explorer II, Silicon-Sculptor 3, SI-EX-TCA
Mounting Style
SMD/SMT
Supply Voltage (min)
2.25 V
Number Of Gates
8000
Package / Case
TQFP-100
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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Table 2-32 • A54SX32A Timing Characteristics
Parameter
2.5 V LVCMOS Output Module Timing
t
t
t
t
t
t
t
t
d
d
d
Note:
1. All –3 speed grades have been discontinued.
2. Delays based on 35 pF loading.
3. The equivalent IO Attribute settings for 2.5 V LVCMOS is 2.5 V LVTTL in the software.
4. To obtain the slew rate, substitute the appropriate Delta value, load capacitance, and the V
DLH
DHL
DHLS
ENZL
ENZLS
ENZH
ENLZ
ENHZ
TLH
THL
THLS
Slew Rate [V/ns] = (0.1*V
where C
4
4
4
d
load
T[LH|HL|HLS]
(Worst-Case Commercial Conditions V
Data-to-Pad Low to High
Data-to-Pad High to Low
Data-to-Pad High to Low—low slew
Enable-to-Pad, Z to L
Data-to-Pad, Z to L—low slew
Enable-to-Pad, Z to H
Enable-to-Pad, L to Z
Enable-to-Pad, H to Z
Delta Low to High
Delta High to Low
Delta High to Low—low slew
is the load capacitance driven by the I/O in pF
is the worst case delta value from the datasheet in ns/pF.
Description
CCI
– 0.9*V
CCI)
/ (C
2,3
load
* d
Min. Max. Min. Max. Min. Max. Min. Max. Min. Max.
–3 Speed
T[LH|HL|HLS]
CCA
= 2.25 V, V
0.031
0.017
0.057
11.1
11.8
3.3
2.5
2.4
3.3
2.1
2.5
1
)
v5.3
–2 Speed
CCI
= 2.3 V, T
0.037
0.017
12.8
13.7
0.06
3.8
2.9
2.8
3.8
2.5
2.9
–1 Speed
J
= 70°C)
0.023
0.043
0.071
14.5
15.5
4.2
3.2
3.2
4.2
2.8
3.2
CCI
Std. Speed
value into the following equation:
0.051
0.023
0.086
17.0
18.2
5.0
3.8
3.7
5.0
3.3
3.8
SX-A Family FPGAs
–F Speed
0.071 ns/pF
0.037 ns/pF
0.117 ns/pF
23.8
25.5
7.0
5.3
5.2
7.0
4.7
5.3
Units
ns
ns
ns
ns
ns
ns
ns
ns
2-39

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