A3P250-VQG100 Actel, A3P250-VQG100 Datasheet - Page 118

• Manufacturer Part Number: A3P250-VQG100
• Description: FPGA - Field Programmable Gate Array 250K System Gates
• Manufacturer: Actel

Specifications of A3P250-VQG100

• Processor Series: A3P250
• Core: IP Core
• Maximum Operating Frequency: 350 MHz
• Number Of Programmable I/os: 157
• Data Ram Size: 36864
• Delay Time: 11.1 ns
• Supply Voltage (max): 1.575 V
• Maximum Operating Temperature: + 70 C
• Minimum Operating Temperature: 0 C
• Development Tools By Supplier: A3PE-Proto-Kit, A3PE-Brd1500-Skt, Silicon-Explorer II, Silicon-Sculptor 3, SI-EX-TCA, FlashPro 4, FlashPro 3, FlashPro Lite
• Mounting Style: SMD/SMT
• Supply Voltage (min): 1.425 V
• Number Of Gates: 250 K
• Package / Case: VQFP-100
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

ProASIC3 DC and Switching Characteristics
Figure 2-41 • FIFO FULL Flag and AFULL Flag Assertion
Figure 2-42 • FIFO EMPTY Flag and AEMPTY Flag Deassertion
Figure 2-43 • FIFO FULL Flag and AFULL Flag Deassertion
2- 10 4
(Address Counter)
(Address Counter)
(Address Counter)
AEMPTY
WA/RA
WCLK
FULL
AFULL
EMPTY
WA/RA
RCLK
WCLK
RCLK
WA/RA
AFULL
WCLK
FULL
MATCH (FULL)
(EMPTY)
MATCH
NO MATCH
1st Rising
After 1st
Edge
Write
1st Rising
After 1st
Edge
Read
NO MATCH
NO MATCH
2nd Rising
t
NO MATCH
CYC
After 1st
Edge
Write
NO MATCH
1st Rising
After 2nd
Edge
Read
NO MATCH
t
RCKEF
R e visio n 9
t
WCKF
t
CKAF
NO MATCH
NO MATCH
Dist = AFF_TH
NO MATCH
NO MATCH
t
WCKFF
t
CKAF
MATCH (FULL)
t
Dist = AEF_TH + 1
CKAF
Dist = AFF_TH – 1