PSMN045-80YS,115 NXP Semiconductors, PSMN045-80YS,115 Datasheet - Page 3
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PSMN045-80YS,115
Manufacturer Part Number
PSMN045-80YS,115
Description
MOSFET N-CH LFPAK
Manufacturer
NXP Semiconductors
Datasheet
1.PSMN045-80YS115.pdf
(15 pages)
Specifications of PSMN045-80YS,115
Input Capacitance (ciss) @ Vds
675pF @ 40V
Fet Type
MOSFET N-Channel, Metal Oxide
Fet Feature
Standard
Rds On (max) @ Id, Vgs
45 mOhm @ 5A, 10V
Drain To Source Voltage (vdss)
80V
Current - Continuous Drain (id) @ 25° C
24A
Vgs(th) (max) @ Id
4V @ 1mA
Gate Charge (qg) @ Vgs
12.5nC @ 10V
Power - Max
56W
Mounting Type
Surface Mount
Package / Case
SC-100, SOT-669
Configuration
Single
Transistor Polarity
N-Channel
Resistance Drain-source Rds (on)
45 mOhms
Drain-source Breakdown Voltage
80 V
Gate-source Breakdown Voltage
+/- 20 V
Continuous Drain Current
17 A, 24 A
Power Dissipation
56 W
Maximum Operating Temperature
+ 175 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 55 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
568-5587-2
NXP Semiconductors
4. Limiting values
Table 4.
In accordance with the Absolute Maximum Rating System (IEC 60134).
PSMN045-80YS
Product data sheet
Symbol
V
V
V
I
I
P
T
T
T
Source-drain diode
I
I
Avalanche ruggedness
E
D
DM
S
SM
Fig 1.
stg
j
sld(M)
DS
DGR
GS
tot
DS(AL)S
(A)
I
D
30
20
10
0
mounting base temperature
Continuous drain current as a function of
0
Limiting values
Parameter
drain-source voltage
drain-gate voltage
gate-source voltage
drain current
peak drain current
total power dissipation
storage temperature
junction temperature
peak soldering temperature
source current
peak source current
non-repetitive drain-source
avalanche energy
50
100
150
All information provided in this document is subject to legal disclaimers.
T
mb
001aal626
(°C)
Rev. 02 — 25 October 2010
200
Conditions
T
T
V
V
pulsed; t
T
T
pulsed; t
V
V
j
j
mb
mb
GS
GS
GS
sup
≥ 25 °C; T
≥ 25 °C; T
= 25 °C; see
= 25 °C
= 10 V; T
= 10 V; T
= 10 V; T
≤ 80 V; R
p
p
≤ 10 µs; T
≤ 10 µs; T
N-channel LFPAK 80 V 45 mΩ standard level MOSFET
j
j
Fig 2.
≤ 175 °C
≤ 175 °C; R
mb
mb
j(init)
GS
= 100 °C; see
= 25 °C
= 50 Ω; unclamped
P
Figure 2
(%)
= 25 °C; I
der
120
mb
80
40
mb
0
function of mounting base temperature
Normalized total power dissipation as a
0
= 25 °C; see
= 25 °C
GS
D
= 20 kΩ
= 22 A;
Figure 1
50
Figure 3
PSMN045-80YS
100
Min
-
-
-20
-
-
-
-
-55
-55
-
-
-
-
150
© NXP B.V. 2010. All rights reserved.
T
mb
175
175
260
Max
80
80
20
17
24
86
56
24
86
18
03aa16
(°C)
200
Unit
V
V
V
A
A
A
W
°C
°C
°C
A
A
mJ
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