XC3S400AN-4FTG256I Xilinx Inc, XC3S400AN-4FTG256I Datasheet - Page 20

• Manufacturer Part Number: XC3S400AN-4FTG256I
• Description: IC FPGA SPARTAN-3AN 256FTBGA
• Manufacturer: Xilinx Inc
• Series: Spartan™-3ANr

Specifications of XC3S400AN-4FTG256I

• Number Of Logic Elements/cells: 8064
• Number Of Labs/clbs: 896
• Total Ram Bits: 368640
• Number Of I /o: 195
• Number Of Gates: 400000
• Voltage - Supply: 1.14 V ~ 1.26 V
• Mounting Type: Surface Mount
• Operating Temperature: -40°C ~ 100°C
• Package / Case: 256-LBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Chapter 2: In-System Flash Memory Architecture
Delivered State
Memory Allocation Tables
20
Each Spartan-3AN FPGA is delivered with an erased ISF memory. Engineering Samples
may have a pre-programmed pattern, and should be erased and reprogrammed with the
FPGA bitstream used in the end application.
•
•
•
•
•
The following tables describe how the ISF memory is allocated to FPGA configuration
bitstreams and the portions that are available for page-aligned and sector-aligned data.
The tables assume that the ISF memory contains two FPGA configuration bitstreams, the
primary bitstream loaded at power-up and a secondary MultiBoot bitstream, starting at
the next sector boundary. If the application does not require a MultiBoot bitstream, then
the allocated ISF memory can be used for data storage. The physical address is shown for
both the
Consequently, the starting page number is different between the addressing modes for any
user data that shares a sector with the end of an FPGA configuration bitstream.
•
•
•
•
•
All Flash memory locations are erased and byte locations contain 0xFF.
Spartan-3AN FPGAs use the
The
all memory sectors are unprotected.
The Unique Identifier field in the
programmed with a value that is unique to every Spartan-3AN FPGA.
The User-Defined Field in the
are 0xFF.
ISF memory allocation for the XC3S50AN FPGA is provided in
ISF memory allocation for the XC3S200AN FPGA is provided in
ISF memory allocation for the XC3S400AN FPGA is provided in
ISF memory allocation for the XC3S700AN FPGA is provided in
ISF memory allocation for the XC3S1400AN FPGA is provided in
“Sector Protection Register,” page 74
Default Addressing Mode
www.xilinx.com
“Default Addressing Mode,” page
“Security Register,” page 83
and for the
“Security Register,” page 83
Spartan-3AN FPGA In-System Flash User Guide
is programmed with 0x00, indicating that
Optional Power-of-2 Addressing
UG333 (v2.1) January 15, 2009
is erased, and all locations
is permanently factory
Table 2-3, page
19.
Table 2-4, page
Table 2-5, page
Table 2-6, page
Table 2-7, page
Mode.
21.
22.
23.
24.
25.
R