LPC11C22FBD48/301, NXP Semiconductors, LPC11C22FBD48/301, Datasheet - Page 46

• Manufacturer Part Number: LPC11C22FBD48/301,
• Description: TXRX CORTEX CAN 16K FLASH
• Manufacturer: NXP Semiconductors
• Series: LPC11Cxxr

Specifications of LPC11C22FBD48/301,

• Core Processor: ARM Cortex-M0
• Core Size: 32-Bit
• Speed: 50MHz
• Connectivity: CAN, CAN Transceiver, I²C, Microwire, SPI, SSI, SSP, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, WDT
• Number Of I /o: 36
• Program Memory Size: 16KB (16K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 3.6 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 48-LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Compliant
• Other names: 568-6643; LPC11C22FBD48/301

NXP Semiconductors
LPC11CX2_CX4
Product data sheet
10.4 I/O pins
10.5 I
Table 16.
T
[1]
Table 17.
T
[1]
[2]
[3]
[4]
[5]
Symbol
t
t
Symbol
f
t
t
t
t
t
2
r
f
SCL
f
LOW
HIGH
HD;DAT
SU;DAT
amb
amb
C-bus
Applies to standard port pins and RESET pin.
See the I
Parameters are valid over operating temperature range unless otherwise specified.
tHD;DAT is the data hold time that is measured from the falling edge of SCL; applies to data in transmission
and the acknowledge.
A device must internally provide a hold time of at least 300 ns for the SDA signal (with respect to the
V
C
=
=
IH
b


(min) of the SCL signal) to bridge the undefined region of the falling edge of SCL.
= total capacitance of one bus line in pF.
40
40


Dynamic characteristic: I/O pins
Dynamic characteristic: I
C to +85
C to +85
2
C-bus specification UM10204 for details.
Parameter
SCL clock
frequency
fall time
LOW period of
the SCL clock
HIGH period of
the SCL clock
data hold time
data set-up
time
All information provided in this document is subject to legal disclaimers.
Parameter
rise time
fall time


C; 3.0 V
C.
Rev. 2 — 3 December 2010
[2]
[4][5][6][7]
[3][4][8]
[9][10]

V
DD
Conditions
pin
configured as
output
pin
configured as
output

2
C-bus pins
3.6 V.
Conditions
Standard-mode
Fast-mode
Fast-mode Plus
of both SDA and
SCL signals
Standard-mode
Fast-mode
Fast-mode Plus
Standard-mode
Fast-mode
Fast-mode Plus
Standard-mode
Fast-mode
Fast-mode Plus
Standard-mode
Fast-mode
Fast-mode Plus
Standard-mode
Fast-mode
Fast-mode Plus
[1]
[1]
32-bit ARM Cortex-M0 microcontroller
Min
3.0
2.5
Min
0
0
0
-
20 + 0.1  C
-
4.7
1.3
0.5
4.0
0.6
0.26
0
0
0
250
100
50
LPC11Cx2/Cx4
Typ
-
-
b
© NXP B.V. 2010. All rights reserved.
Max
100
400
1
300
300
120
-
-
-
-
-
-
-
-
-
-
-
-
Max
5.0
5.0
Unit
kHz
kHz
MHz
ns
ns
ns
s
s
s
s
s
s
s
s
s
ns
ns
ns
Unit
ns
ns
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