F276-CEG-T-TR STMicroelectronics, F276-CEG-T-TR Datasheet - Page 81

• Manufacturer Part Number: F276-CEG-T-TR
• Description: IC MCU 16BIT 832KB FLASH 144LQFP
• Manufacturer: STMicroelectronics
• Series: ST10r

Specifications of F276-CEG-T-TR

• Core Processor: ST10
• Core Size: 16-Bit
• Speed: 48MHz
• Connectivity: ASC, CAN, EBI/EMI, I²C, SSC, UART/USART
• Peripherals: POR, PWM, WDT
• Number Of I /o: 111
• Program Memory Size: 832KB (832K x 8)
• Program Memory Type: FLASH
• Ram Size: 68K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 24x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 105°C
• Package / Case: 144-LFQFP
• Processor Series: ST10F27x
• Core: ST10
• Data Bus Width: 16 bit
• Data Ram Size: 68 KB
• Interface Type: CAN, I2C
• Maximum Clock Frequency: 48 MHz
• Number Of Programmable I/os: 111
• Number Of Timers: 2
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 24 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: No

ST10F276E
8.2
Exception and error traps list
Table 42
time.
Table 42.
1. All the class B traps have the same trap number (and vector) and the same lower priority compare to the
Reset Functions:
Hardware Reset
Software Reset
Watchdog Timer Overflow
Class A Hardware Traps:
Non-Maskable Interrupt
Stack Overflow
Stack Underflow
Class B Hardware Traps:
Undefined Opcode
MAC Interruption
Protected Instruction Fault
Illegal word Operand Access
Illegal Instruction Access
Illegal External Bus Access
Reserved
Software Traps
TRAP Instruction
class A traps and to the resets.
Each class A trap has a dedicated trap number (and vector). They are prioritized in the second priority
level.
The resets have the highest priority level and the same trap number.
The PSW.ILVL CPU priority is forced to the highest level (15) when these exceptions are serviced.
Exception condition
shows all of the possible exceptions or error conditions that can arise during run-
Trap priorities
UNDOPC
MACTRP
PRTFLT
ILLOPA
ILLBUS
STKOF
STKUF
ILLINA
Trap
NMI
flag
STOTRAP
STUTRAP
NMITRAP
RESET
RESET
RESET
BTRAP
BTRAP
BTRAP
BTRAP
BTRAP
BTRAP
vector
Trap
[002Ch - 003Ch]
0000h – 01FCh
in steps of 4h
00’0000h
00’0000h
00’0000h
00’0008h
00’0010h
00’0018h
00’0028h
00’0028h
00’0028h
00’0028h
00’0028h
00’0028h
location
Vector
Any
[0Bh - 0Fh]
[00h - 7Fh]
number
Trap
0Ah
0Ah
0Ah
0Ah
0Ah
0Ah
Any
00h
00h
00h
02h
04h
06h
Interrupt system
priority
Current
Priority
Trap
CPU
III
III
III
81/231
II
II
II
I
I
I
I
I
I
(1)