MPC8533EVTALFA Freescale Semiconductor, MPC8533EVTALFA Datasheet - Page 73

• Manufacturer Part Number: MPC8533EVTALFA
• Description: MPU POWERQUICC 783-PBGA
• Manufacturer: Freescale Semiconductor

Specifications of MPC8533EVTALFA

• Processor Type: MPC85xx PowerQUICC III 32-Bit
• Speed: 667MHz
• Voltage: 0.95 V ~ 1.05 V
• Mounting Type: Surface Mount
• Package / Case: 783-BBGA, FCBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Features: -

Table
Number
11-1
11-2
11-3
11-4
11-5
11-6
11-7
11-8
11-9
12-1
12-2
12-3
12-4
12-5
12-6
12-7
12-8
12-9
12-10
12-11
12-12
12-13
12-14
12-15
12-16
12-17
12-18
12-19
12-20
12-21
12-22
12-23
12-24
12-25
12-26
12-27
12-28
12-29
12-30
12-31
12-32
Freescale Semiconductor
I
I
I
I2CADR Field Descriptions.................................................................................................. 11-6
I2CFDR Field Descriptions .................................................................................................. 11-7
I2CCR Field Descriptions ..................................................................................................... 11-8
I2CSR Field Descriptions ..................................................................................................... 11-9
I2CDR Field Descriptions................................................................................................... 11-10
I2CDFSRR Field Descriptions.............................................................................................11-11
Example Descriptor............................................................................................................... 12-4
SEC Base Address Map ...................................................................................................... 12-10
SEC Address Map ............................................................................................................... 12-11
Header Dword Bit Definitions ............................................................................................ 12-17
EU_SEL0 and EU_SEL1 Values ........................................................................................ 12-18
Descriptor Types ................................................................................................................. 12-19
Pointer Dword Field Definitions......................................................................................... 12-20
Link Table Field Definitions ............................................................................................... 12-22
Descriptor Format by Type ................................................................................................. 12-24
PKEU[ROUTINE] Field Values ......................................................................................... 12-27
PKEU Reset Control Register Field Descriptions .............................................................. 12-29
PKEU Status Register Field Descriptions........................................................................... 12-30
PKEU interrupt Status Register Field Descriptions ............................................................ 12-31
PKEU Interrupt Control Register Field Descriptions ......................................................... 12-32
DEU Mode Register Field Descriptions ............................................................................. 12-34
DEU Key Size Register Field Descriptions ........................................................................ 12-34
DEU Reset Control Register Field Descriptions................................................................. 12-35
DEU Status Register Field Descriptions ............................................................................. 12-36
DEU Interrupt Status Register Field Descriptions .............................................................. 12-37
DEU Interrupt Control Register Field Descriptions ........................................................... 12-39
AFEU Mode Register Field Descriptions ........................................................................... 12-43
AFEU Reset Control Register Field Descriptions .............................................................. 12-45
AFEU Status Register Field Descriptions........................................................................... 12-46
AFEU Interrupt Status Register Field Descriptions............................................................ 12-47
AFEU Interrupt Control Register Field Descriptions ......................................................... 12-48
MDEU Mode Register in Old Configuration (NEW = 0)................................................... 12-51
MDEU Mode Register in New Configuration (NEW = 1) ................................................. 12-52
Mode Register —HMAC or SSL-MAC Generated by Single Descriptor.......................... 12-53
Mode Register —HMAC Generated Across a Sequence of Descriptors............................ 12-54
MDEU Reset Control Register Field Descriptions ............................................................. 12-55
MDEU Status Register Field Descriptions ......................................................................... 12-56
MDEU Interrupt Status Register Field Descriptions .......................................................... 12-57
2
2
2
C Interface Signal Descriptions ......................................................................................... 11-3
C Interface Signal—Detailed Signal Descriptions............................................................. 11-4
C Memory Map .................................................................................................................. 11-5
MPC8533E PowerQUICC III Integrated Host Processor Family Reference Manual, Rev. 1
Tables
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